ADF4030

推荐用于新设计

10-Channel Precision Synchronizer

产品模型: 2

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概述

10 BSYNC channels
Precise BSYNC time alignment (<5 ps)
Enables clock synchronization in large distribution networks
Independent programmable BSYNC channel delay
Precise path delay compensation of each BSYNC channel using bidirectional loopback capability

Flexible physical interface supports PCB trace or cable connections with DC or AC coupling
Each BSYNC channel supports gapped periodic clocking
Integrated TDC
Integrated Temperature Sensor

The ADF4030 provides for 10 bidirectional synchronized clock (BSYNC) channels and accepts a reference clock input (REFIN) signal as a frequency reference for generating an output clock on any BSYNC channels that are configured as an output. The hallmark feature of the ADF4030 is the ability to time align the clock edges of any one or more BSYNC channels to <5 ps (at the device pins) with respect to the BSYNC channel selected as the reference BSYNC channel.

The ADF4030 is well adapted for multiple connections with other ADF4030 devices for synchronizing clock signals in a system. Each BSYNC is bidirectional, allowing for reversing the direction of the clock signal to measure the propagation delay of the transmission medium. Round trip constructions that use replica paths are also supported. The bidirectional nature of the round trip delay measurement greatly reduces the error in determining the propagation delay through the BSYNC transmission medium as compared to using a replica path. This feature makes the ADF4030 capable to time align the clock edges of BSYNC channels across multiple ADF4030 devices, independent of the tree or cascade architecture in which the ADF4030 system is designed. The benefits of bidirectional clocking extend to devices other than the ADF4030 (assuming those devices support bidirectional clock exchanges).

The output divider block associated with each BYSNC channel has an optional pseudorandom binary sequence (PRBS) generator for Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT FUNCTIONAL BLOCK DIAGRAM Figure 1. Functional Block Diagram producing gapped periodic clock signals that supports JESD204B and JESD204BC operation.

The ADF4030 may be used as a standalone differential time-to-digital converter (TDC) to measure the difference in time between clocks arriving at the inputs.

The RMS jitter of one ADF4030 BSYNC clock is 4.3 ps typical.

The ADF4030 is available in a 48-lead, 7 mm × 7 mm, land grid array [LGA] package and operates over the −40°C to +105°C ambient temperature range.

Throughout the data sheet, the letter x is used to mean any integer. For example, in BSYNCx, x refers to any channel from Channel 0 to Channel 9.

APPLICATIONS

5G timing transport high precision synchronization
Phased array radar
Automatic test equipment (ATE) pin electronics
JESD204B/JESD204C support for analog-to-digital converter (ADC) and digital-to-analog converter (DAC) clocking

产品模型: 2

参考资料

数据手册 1

ADF4030: 10-Channel Precision Synchronizer Data Sheet (Rev.0) 06/26/2024

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产品型号	引脚/封装图-中文版	文档	CAD 符号，脚注和 3D模型
ADF4030BCCZ	48-Terminal Land Grid Array [LGA]	Material Declaration Reliablity Data 资料包	Ultra Librarian SamacSys
ADF4030BCCZ-RL7	48-Terminal Land Grid Array [LGA]	Material Declaration Reliablity Data 资料包	Ultra Librarian SamacSys

这是最新版本的数据手册

软件资源

器件驱动器 2

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硬件生态系统

部分模型	产品周期	描述
开关稳压器和控制器 1
LTM8053	推荐用于新设计	40V_IN、3.5A/6A 降压型超低噪声开关稳压器 μModule 稳压器
线性稳压器 2
ADP7159	推荐用于新设计	2 A、超低噪声、高PSRR、可调输出、RF线性稳压器
ADP7112	推荐用于新设计	20 V、200 mA低噪声CMOS LDO线性稳压器

工具及仿真模型

IBIS 模型 1

ADF4030 IBIS Model

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特性和优点

EV-ADF4030SD1Z evaluation board including the ADF4030 10channel precision synchronizer, Arduino interface, and voltage regulators
Allows multiple ways to provide a reference clock to the ADF4030
- Single-ended from a signal generator
- Differential from another device or additional ADF4030 devices
Gives access to all 10 ADF4030 BSYNC bidirectional I/O lines using twinax and SMA connectors
Facilitates interfacing the ADF4030 clocks with an oscilloscope or other boards using an interposer board
SDP-K1 controller board functions as an interface between a PC and the evaluation board
Up to 16 EV-ADF4030SD1Z evaluation boards can be stacked up using the Arduino connector
Windows^®-based software allows control of all ADF4030 functions from a PC

产品详情

The EV-ADF4030SD1Z evaluates the performance of the ADF4030 10-channel precision synchronizer. The SDP-K1 controller board must be connected to the EV-ADF4030SD1Z using the Arduino connector underneath the evaluation board. Multiple EVADF4030SD1Z evaluation boards can be stacked up onto the SDP-K1 controller board using the Arduino connector.

A photograph of the evaluation board with the SDP-K1 controller board is shown in Figure 1. The evaluation board contains the ADF4030 10-channel precision synchronizer, the power supply connectors, and the Arduino connector used to connect to the SDP K1 board. This combination allows software programming of the evaluation board using ACE software.

Full specifications for the ADF4030 precision synchronizer are available in the product data sheet, which must be consulted in conjunction with this user guide when working with the evaluation board.