ADF4030

• EV-ADF4030SD1Z 评估板包括 ADF4030 10 通道精密同步器、Arduino 接口和电压调节器
• 允许通过多种方式为 ADF4030 提供参考时钟
  • 来自信号发生器的单端
  • 与另一台设备或其他 ADF4030 设备的差分
• 使用双绞线和 SMA 连接器访问所有 10 条 ADF4030 BSYNC 双向 I/O 线路
• 方便使用中介板将 ADF4030 时钟与示波器或其他电路板连接
• SDP-K1 控制器板可作为 PC 和评估板之间的接口
• 使用 Arduino 连接器最多可以堆叠 16 个 EV-ADF4030SD1Z 评估板
• 基于 Windows^® 的软件允许通过 PC 控制 ADF4030 的所有功能

EV-ADF4030SD1Z 评估 ADF4030 10 通道精密同步器的性能。必须使用评估板下方的 Arduino 连接器将 SDP-K1 控制器板连接到 EV-ADF4030SD1Z。可以使用 Arduino 连接器将多个 EV-ADF4030SD1Z 评估板堆叠到 SDP-K1 控制器板上。

图 1 显示了带有 SDP-K1 控制器板的评估板的照片。该评估板包含 ADF4030 10 通道精密同步器、电源连接器以及用于连接 SDP K1 板的 Arduino 连接器。这种组合允许使用 ACE 软件对评估板进行软件编程。

产品数据手册中包含 ADF4030 精密同步器的完整规格说明，使用评估板时必须同时参阅产品数据手册和本用户指南。

• Multi-Channel, Wideband System Development Platform Using Apollo (AD9084)
• Mates With Xilinx VCU118 Evaluation Board (Not Included)
• 16x RF Receive (Rx) Channels
• Total 16x 8GSPS to 20GSPS ADC
• Digital Down Converters (DDCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• 16x RF Transmit (Tx) Channels
• Total 16x 8GSPS to 28GSPS DAC
• Digital Up Converters (DUCs), Each Including Complex Numerically-Controlled Oscillators (NCOs)
• Programmable Finite Impulse Response Filters (pFIRs)
• Complex Finite Impulse Response Filters (CFIRs)
• Flexible Rx & Tx RF Front-Ends
• Rx: Filtering, Amplification, Digital Step Attenuation for Gain Control
• Tx: Filtering, Amplification
• Flexible Clock Distribution
• On-Board Clock Distribution from Single External 400MHz Reference
• Support for External Converter Clock per AD9084 via solder rework
• On-Board Power Regulation from Single 12V Power Adapter (Included)

• Mates to ADXBAND16EBZ Digitizing Card & VCU118 PMOD Interface (Cable Included)
• Provides Both Individual Adjacent Channel Loopback and Combined Channel Loopback Options
• Combined Tx Channels Out Option
• Combined Rx Channels In Option

Easy Control Tools and Platform Interfaces to Simplify Software Framework Developments:

• IIO Oscilloscope GUI
• MATLAB Add-Ons & Example Scripts
• Example HDL Builds including JESD204C Bring-Up
• Embedded Software Solutions for Linux and Device Drivers

• Multi-Chip Synchronization for Power-Up Phase Determinism
• System-Level Amplitude/Phase Alignment Using NCOs
• Low-Latency ADC-to-DAC Loopback Bypassing JESD Interface
• pFIR Control for Broadband Channel-to-Channel Amplitude/Phase Alignment
• Fast-Frequency Hopping

The ADXBAND16EBZ contains four AD9084 mixed‑signal front‑end devices, including the RF front end, clocking, and power circuitry. The ADXBAND16EBZ serves as a complete system solution targeting common applications such as phased‑array radars, wideband systems, and ground‑based SATCOM. Its primary target application is a 16‑Tx/16‑Rx direct X‑band sampling phased array.

The platform is intended as a testbed for demonstrating multi‑chip synchronization, as well as implementing system‑level calibrations, beamforming algorithms, and other signal‑processing techniques. The system is designed to interface with the VCU118 Evaluation Board from Xilinx^®, which features the Virtex^® UltraScale+™ XCVU9P FPGA, along with provided reference software, HDL code, and MATLAB system‑level interfaces.

A 16‑Tx/16‑Rx Calibration Board can be used to develop system‑level calibration algorithms, including demonstrations of power‑up phase determinism. The Calibration Board provides improvements in combined‑channel dynamic range, spurious performance, and phase noise, and can be controlled via a MATLAB add‑on when connected to the PMOD interface of the VCU118.