概览
优势和特点
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产品详情
The AD5379 contains 40 14-bit DACs in one CSPBGA package. The AD5379 provides a bipolar output range determined by the voltages applied to the VREF(+) and VREF(−) inputs. The maximum output voltage span is 17.5 V, corresponding to a bipolar output range of −8.75 V to +8.75 V, and is achieved with reference voltages of VREF(−) = −3.5 V and VREF(+) = +5 V.The AD5379 offers guaranteed operation over a wide VSS/VDD supply range from ±11.4 V to ±16.5 V. The output amplifier headroom requirement is 2.5 V operating with a load current of 1.5 mA, and 2 V operating with a load current of 0.5 mA.
The AD5379 contains a double-buffered parallel interface in which 14 data bits are loaded into one of the input registers under the control of the WR, CS, and DAC Channel Address Pins A0 to A7. It also has a 3-wire serial interface that is com-patible with SPI®, QSPI™, MICROWIRE™, and DSP® interface standards and can handle clock speeds of up to 50 MHz.
The DAC outputs are updated upon reception of new data into the DAC registers. All the outputs can be simultaneously updated by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.
Each DAC output is gained and buffered on-chip with respect to an external REFGND input. The DAC outputs can also be switched to REFGND via the CLR pin.
Applications
- Level setting in automatic test equipment (ATE)
- Variable optical attenuators (VOA)
- Optical switches
- Industrial control systems
产品生命周期
量产
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评估套件 (1)
参考资料
工具及仿真模型
精密DAC误差预算工具
精密DAC误差预算工具是一种Web应用程序，用于计算精密DAC信号链的直流精度。它可显示整个信号链中的静态误差状况，以快速评估设计利弊。可计算由基准电压源、运算放大器和精密DAC引起的直流误差。
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| Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
|---|---|---|---|---|
| AD5379ABCZ | 材料声明 | 质量和可靠性 | 108-Ball CSPBGA (13mm x 13mm x 1.7mm) | |
| Wafer Fabrication Data |
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