数字孪生

AD3552R 是一款低漂移超快 16 位精确度的电流输出数模转换器 (DAC)，可在多个电压跨度范围下配置。AD3552R 以 2.5 V 固定基准电压运行。

每个 DAC 包含 3 个漂移补偿反馈电阻器，用于所需的外部跨阻放大器 (TIA)，对输出电压进行缩放。失调和增益缩放寄存器生成多个输出跨度范围，如 0V-2.5V、0V-5V、0V-10V、-5V - +5V、-10V - +10V，以及完整 16 位解析度的自定义中间范围。

DAC 可在快速模式下运行，从而实现最高速度；或者在精确模式下运行，从而实现最高精度。

串行外设接口 (SPI) 可配置为四 SPI 模式、双同步 SPI 模式、双 SPI 模式和单 SPI（经典 SPI）模式，支持单数据速率 (SDR) 或双数据速率 (DDR)，逻辑电平为 1.2 V 至 1.8 V。

AD3552R 适应扩展的工业级温度范围（–40°C 至 +105°C）。

应用

• 仪器仪表
• 硬件在环
• 过程控制设备
• 医疗设备
• 自动测试设备
• 数据采集系统
• 可编程电压源
• 光通信

AD3542R是一款低漂移、双通道、超快速、16位精度、电压输出数模转换器(DAC)，可在多个电压范围内配置。AD3542R采用2.5V固定基准电压源。

该器件包含3个漂移补偿反馈电阻器，用于调节输出电压的内部跨阻放大器(TIA)。失调和增益调整寄存器允许生成多个输出范围，如0V至2.5V、0V至5V、0V至10V、-5V至+5V和-2.5 V至+7.5 V。

DAC可在快速模式下运行以实现最高速度，或在精确模式下运行以实现最高精度。

串行外设接口(SPI)可配置为单通道SPI（经典SPI）模式、双通道SPI模式、具有单倍数据速率(SDR)或双倍数据速率(DDR)的同步双通道SPI模式，逻辑电平为1.2V至1.8V。

为提高器件鲁棒性，可使能循环冗余检验（CRC）。还集成了多个错误校验器，以检测VREF故障或存储器映射损坏。

AD3542R的额定温度范围为-40°C至+105°C扩展工业温度范围。

应用

• 仪器仪表
• 硬件在环
• 过程控制设备
• 医疗设备
• 自动测试设备
• 数据采集系统
• 可编程电压源
• 光通信

ADAQ23878是一款高精度、高速μModule^®数据采集解决方案，通过将设计人员选择、优化和布局器件的重任移交给器件来缩短开发高精度测量系统的开发周期。

ADAQ23878采用系统级封装(SIP)技术，通过将多个常用的信号处理和调节块集成到单个器件（包括低噪声全差分ADC驱动器(FDA)、稳定的基准电压源缓冲器和高速18位15 MSPS逐次逼近寄存器(SAR) ADC）中来减少终端系统所含的器件数量。

ADAQ23878也集成采用ADI公司的iPassive^®技术、具备出色的匹配和偏移特征的关键无源器件，以尽可能减少与温度相关的误差源，并提供优化性能。ADC驱动器级的快速建立和SAR ADC的零延迟特性为高通道数复用信号链架构和控制回路应用提供了一种独特的解决方案。

9 mm × 9 mm小尺寸BGA封装帮助进一步减小小型仪器仪表的体积，且不会减弱其性能。系统集成解决了诸多设计挑战，但器件仍可以灵活提供可配置的ADC驱动器反馈回路，以调节增益或衰减，以及全差分或单端到差分输入。可以执行单个5 V电源操作，同时发挥器件的优化性能。

ADAQ23878采用串行低压差模信号(LVDS)数字接口，提供单路或双路输出模式，让用户能够优化每个应用的接口数据速率。ADAQ23878的额定工作温度范围为-40°C至+85°C。

应用

• 自动测试设备
• 数据采集
• 硬件在环(HiL)
• 功率分析仪
• 非破坏性试验（声频发射）
• 质谱测定
• 行波故障测距
• 医疗成像与仪器仪表

ADN4622/ADN4624是四通道、信号隔离式、低压差模信号(LVDS)缓冲器，数据速率高达2.5 Gbps，并且具有极低的抖动。该套件集成了ADI公司的iCoupler^®技术，已针对高速运行进行了增强，可提供LVDS信号链的插入式电气隔离。到LVDS接收器和来自LVDS驱动器的交流耦合和/或电平转换允许隔离其他高速信号，例如电流模式逻辑(CML)。

ADN4622/ADN4624包括一种刷新机制，用于监控输入和输出状态，并确保它们在没有数据转换的情况下（例如上电时）保持不变。为了以低抖动实现低功耗和高速运行，LVDS和隔离器电路采用1.8 V电源。ADN4624完全适用于较宽的工业温度范围，采用28引脚、宽体、细间距SOIC_W_FP封装，爬电距离和电气间隙为8.3 mm（适用于5.7 kV rms或8 kV_峰值浪涌和脉冲电压，并在交流主电源电压下增强绝缘）或 6 mm × 6 mm LFCSP 封装，爬电距离和间隙为 1.27 mm（用于基本/功能隔离）。

应用

• 隔离视频和成像数据
• 模拟前端隔离
• 数据平面隔离
• 隔离高速时钟和数据链路
• 多千兆位序列化/反序列化(SERDES)
• 板对板光纤更换（例如：短距离光纤）

As modern electronic, electromechanical, and electro-optical systems continue to shrink in size, require faster response times, and have more stringent accuracy requirements, performance of the data acquisition and hardware-in-the-loop (HIL) systems required to simulate, develop, and test these systems must keep pace. This is particularly true for applications requiring high power elements, such as the testing of motor controllers, linear actuators, generator controllers, electric vehicle chargers, or power grid elements for the automotive and energy industries. The increasing complexity of these modeled components leads to increased computation times, demanding faster solutions for signal acquisition and generation.

The circuit shown in Figure 1 is a complete precision low latency development kit, with 200 ns latency, and high-accuracy input bandwidth. This solution enables real-time HIL simulations and development of complex systems, significantly easing the design and testing of digital or mixed signal control loops. It is consists of four 16-bit analog-to-digital converter (ADC) channels and four 16-bit digital-to-analog converter (DAC) channels that allow synchronous acquisition of analog inputs and generation of output waveforms at 15 MSPS.

The development kit provides up to 5 MHz analog input bandwidth with extended analog and digital connectivity to simplify analog front end (AFE) design. Both the analog input range and output are hardware-selectable with five bipolar input ranges from ±1.5 V to ±10 V, and five output ranges from 5 V unipolar to ±10 V bipolar.

The software interface is available through the Linux industrial input/output (IIO) framework, providing a host of debug and development utilities and cross platform application support through Python, MATLAB^®, C, C#, and other languages. The project integrates with Simulink^®, where real-time models can be generated and loaded into the field programmable gate array (FPGA) board for testing with external hardware.

As modern electronic, electromechanical, and electro-optical systems continue to shrink in size, require faster response times, and have more stringent accuracy requirements, performance of the data acquisition and hardware-in-the-loop (HIL) systems required to develop and test these systems must keep pace.

The circuit shown in Figure 1 consists of four 16-bit analog-to-digital (ADC) channels and four 16-bit digital-to-analog (DAC) channels that are interfaced with a field programmable gate array (FPGA) through a low pin count (LPC) FPGA mezzanine card (FMC) connector, providing a complete real-time precision data acquisition and signal generation platform with on-board power rails, voltage monitoring, logic level translation, general purpose I/O, I2C, SPI, and an application-specific analog front-end (AFE) interface connector.

A full capture and conversion of up to four simultaneous differential analog input signals at 15 MSPS can be performed in under 100 ns, with pin configurable input voltage ranges of ±10 V, ±5 V, ±4.096 V, ±2.5 V, and ±1.5 V.

Four analog output channels are provided using two dual 33 MSPS DACs with pin-configurable output voltage ranges of 0 V to +2.5 V, 0 V to +5 V, ±5 V, and ±10 V, enabling full-scale settled analog outputs to be generated in under 200 ns from initial data write to the DACs. Four simultaneous outputs can be generated at 15 MSPS or two can be generated at 30 MSPS. Analog bandwidth up to 5 MHz is supported for both signal acquisition and generation

The software interface is through the Linux industrial input/output (IIO) framework, providing a host of debug and development utilities and cross platform application support. Software templates are available in popular programming languages like Python and MATLAB^® to enable customized signal generation and data acquisition. Hardware description language (HDL) templates are available to facilitate the addition of custom functionality.

• 易于设计，由于LVDC直接隔离器带有完全兼容的输入/输出和超低抖动。


• 具有600 Mbps的高带宽，以便支持较高的ADC分辨率和速度。


• 实现电气隔离，以便提供电源电压保护、电源隔离测量或数字或电源电路抗扰度。