AD9874:  Low Power IF Digitizing Subsystem

The AD9874 is a general purpose IF subsystem that digitizes a low level 10-300MHz IF input signal with a bandwidth of up to 270 kHz. The signal chain of the AD9874 contains a low-noise amplifier, mixer, a band pass sigma-Delta analog-to-digital converter and a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit provides the AD9874 with 12 dB of continuous gain adjustment

The high dynamic range and inherent anti-aliasing provided by the bandpass sigma delta converter allows the AD9874 to cope with blocking signals 95 dB stronger than the desired signal. Auxiliary blocks include clock and LO synthesizers in addition to a serial peripheral interface port.

The SPI port programs numerous parameters of the AD9874, thus allowing the device to be optimized for any given application. Programmable parameters include synthesizer divide ratios, AGC attenuation and attack/decay time, received signal strength level, decimation factor, output data format, 16 dB attenuator, and the selected bias currents. The bias currents of the LNA and mixer can be further reduced at the expense of degraded performance for battery-powered applications.

Applications

• Multimode Narrow-Band Radio Products Analog/Digital UHF/VHF FDMA Receivers TETRA, APCO25, GSM/EDGE
• Portable and Mobile Radio Products
• Base Station Applications
• SATCOM Terminals