AD5330:  2.5V to 5.5V, 115µA Parallel Interface Single Voltage-Output 8-Bit DAC

The AD5330/AD5331/AD5340/AD5341* are single 8-/10-/12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to ...More

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AD5330:  2.5V to 5.5V, 115µA Parallel Interface Single Voltage-Output 8-Bit DAC

Product Description

The AD5330/AD5331/AD5340/AD5341* are single 8-/10-/12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 115 μA at 3 V and feature a power-down mode that further reduces the current to 80 nA. The devices incorporate an on-chip output buffer that can drive the output to both supply rails, but the AD5330, AD5340, and AD5341 allow a choice of buffered or unbuffered reference input.

The AD5330/AD5331/AD5340/AD5341 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR.

The GAIN pin allows the output range to be set at 0 V to VREF or 0 V to 2 × VREF.

Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using the LDAC pin.

An asynchronous CLR input is also provided, which resets the contents of the input register and the DAC register to all zeros. These devices also incorporate a power-on reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device.

The AD5330/AD5331/AD5340/AD5341 are available in thin shrink small outline packages (TSSOP).

Applications

  • Portable battery-powered instruments
  • Digital gain and offset adjustment
  • Programmable voltage and current sources
  • Programmable attenuators
  • Industrial process control

    • * Protected by U.S. Patent Number 5,969,657; other patents pending.

    Data Sheet, Rev. A, 2/08

    Features

    • Single 8-Bit DAC in 20-Lead TSSOP
    • Low power operation: 115 μA @ 3 V, 140 μA @ 5 V
    • Power-down to 80 nA @ 3 V, 200 nA @ 5 V via PD Pin
    • 2.5 V to 5.5 V power supply
    • Double-buffered input logic
    • Guaranteed monotonic by design over all codes
    • Buffered/unbuffered reference input options
    • See Data Sheet for Additional Information

    Diagrams

    AD5330 Diagram
    Functional Block Diagram for AD5330

    Характеристики

    Resolution (Bits) 8bit
    DAC Update Rate 167kSPS
    DAC Settling Time 6µs
    # DAC Outputs 1
    DAC Type Voltage Out
    DAC Input Format Par
    Output FSR (Uni 2Vref),(Uni Vref)
    Ref Int/Ext Ext
    Supply Vnom Single(+2.7),Single(+3),Single(+3.3),Single(+5)
    Pwr Diss (Max) 1.25mW
    Package SOP

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    Получать уведомление о новинках More
    Part# Res (bits) Update Rate Settling Time # Outputs
    AD5300 8 250KSPS 4µs 1
    AD5301 8 167KSPS 6µs 1
    AD9704 8 175MSPS 11ns 1
    AD5602 8 1.7MSPS 6µs 1
    AD557 8 1.25MSPS 800ns 1
    AD5330 8 167KSPS 6µs 1
    AD9708 8 125MSPS 35ns 1