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Download this article in PDF format. (1956 KB) Insight into digiPOT Specifications and Architecture Enhances AC Performance
The digiPOT can be used in two different modes:
When the wiper is hardwired to either end, the potentiometer
becomes a simple variable resistor, or
There are no restrictions on the polarity of currents or
voltages appearing at the digiPOT resistance terminals, but the amplitude of ac
signals cannot exceed the power-supply rails (V
V × (_{OUT} = V_{IN}R), where
_{DAC}/R_{POT}R is the nominal end-to-end resistance of the digiPOT, and
_{POT}R is the digitally selected resistance between W and the reference pin of the
input signal, typically Terminal B, as shown in Figure 3._{DAC}
Signal amplification requires an active component, typically an inverting or noninverting amplifier. Either potentiometer or rheostat mode can be used, with the appropriate gain equation. Figure 4 shows a noninverting amplifier using the device as
a potentiometer to adjust the gain via feedback. Since the fraction of output
fed back, R), must
be equal to the input, the idealized gain is_{WB} + R_{AW}
The gain of this circuit, inversely proportional to R approaches zero, defining a
hyperbolic transfer function. To limit the maximum gain, insert a resistor in
series with _{AW}R (and in the denominator of the gain
equation)._{AW}If a linear gain relationship is desired, the rheostat mode can be used in conjunction with a fixed external resistor, as shown in Figure 5; the gain is now defined as:
For best performance, connect the lower capacitance terminal (the W pin in newer devices) to the op-amp input.
Bandwidth is the maximum frequency that can
pass through the digiPOT with less than 3-dB attenuation due to parasitic
components. Total harmonic distortion (THD)—here defined as the ratio of
the rms sum of the next four harmonics to the fundamental value of the output—is
a measure of signal degradation as it passes through the device. The
performance limits implied by these specifications are caused by the internal
digiPOT architecture. An analysis will be helpful in order to fully understand
these specifications and reduce their negative effects.The internal architecture has evolved from the classical
serial resistor array, shown in Figure 6a, to the segmented architecture, shown
in 6b. The main improvement is the decreased number of internal switches
required. In the first case, a serial topology, the number of switches is n = 10,
1024 switches are required.
The proprietary (patented) segmented architecture uses a cascade connection that minimizes the total number of switches. The example of Figure 6b shows a two-segment architecture, formed by two types of blocks: MSB on the left, and LSB on the right. The upper and lower blocks at left are strings of switches
for the coarse bits (MSB segment). The block at right is a string of switches
for the fine bits (LSB segment). The MSB switches establish a coarse
approximation to the R The number of switches in the segmented architecture is:
where n is the total number of bits and m the number of bits
of resolution in the MSB word. For example, if The segmented scheme requires fewer switches than the conventional string:
In this example, the savings would be
In both architectures, switches are responsible for choosing
among the different resistance values, making it important to understand the ac
error sources in an analog switch. These CMOS (complementary-metal-oxide
semiconductor) switches are made up of P-channel and N-channel MOSFETs in
parallel. This basic bilateral switch maintains a fairly constant resistance (
C = drain-gate + drain-bulk capacitance;
_{D}C = source-gate +
source-bulk capacitance._{S}The transfer relationship is defined in the equation below, where these assumptions have been applied: - Source impedance is 0 Ω
- No external load contribution
- No contribution from
*C*_{DS} *R*<<_{LSB}*R*_{MSB}
where:
The transfer equation has many factors and is somewhat code-dependent, so the following further assumptions are used to simplify the equation
The RC low-pass filter is the dominant response. A good
approximation of the simplified equati on is:and the bandwidth ( where The
The parasitic track capacitance of the PC board should be taken into account, otherwise the maximum BW will be lower than expected; the track capacitance can be calculated straightforwardly as where
For example, assuming FR4 board material with two signal
layers and power/ground planes, ε
R variation with voltage. An exaggerated example of amplitude distortion is shown
in Figure 9._{ON}
The
The resistance curve does depend on the supply voltage
rails; the internal switches have the lowest R variation, and hence the nonlinearity, increases. Figure 11 compares
_{ON}R variation at two supply levels for a low-voltage digiPOT._{ON}
The THD depends on multiple factors and is thus hard to
quantify, but assuming a 10% variation in R As a general rule, the higher the nominal digiPOT resistance
(
R,
so it is not possible to improve one specification without penalizing the
other. So the circuit designer must choose an appropriate balance. This is also
true at the device design level, since the IC designer must balance the
parameters in the design equations:_{POT}where
One approach is to use a dual supply and simply ground the
potentiometer to the power-supply common. The signal can then have a
positive-negative swing. Another way, if a single supply is required, or the
particular digiPOT doesn’t support dual supply, is to add an offset voltage of
If a signal amplifier is required, an inverting amplifier, with a dual supply, as shown in Figure 13, is preferred over the noninverting amplifier for two reasons: - Provides better THD performance because the virtual ground at the inverting pin will center the switch resistance in the middle of the voltage range.
- As the inverting pin is at virtual ground, the
wiper capacitance, C
_{DLSB}, is almost canceled to obtain a small increase in bandwidth (but one must pay attention to circuit stability).
rheostat mode and 5 ppm/°C
(ratio) in divider mode. The devices perform the same electronic
adjustment function as mechanical potentiometers, but are smaller and more
reliable. Their wiper position can be adjusted via an SPI-compatible interface.
Unlimited adjustments can be made before blowing a fuse to fix the wiper
position, a process analogous to putting epoxy on a mechanical trimmer. This
process can be repeated up to 20 times (“removing the epoxy”). Operating on a
single 9-V to 33-V supply or dual ±9-V
to ±16.5-V
supplies, the AD5291/AD5292 dissipate 8 μW.
Available in 14-lead TSSOP packages, they are specified from
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