CN0171: Low Noise, Low Distortion Single-Ended Input Drive Circuit for Differential Input IF Sampling ADCs

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回路の説明

回路の機能とその利点
  • Single ended to differential conversion
  • 50 ohm impedance matched gain block
  • Matched filter provides noise reduction and antialiasing
使用されている製品
    アプリケーション: 
  • 通信
  • 通信

CIRCUIT FUNCTION AND BENEFITS

The circuit shown in Figure 1 uses the ADL5535/ ADL5536 single-ended IF low noise 50 Ω gain block to drive the AD9268 16-bit differential input analog-to-digital converter (ADC). The circuit includes an interstage bandpass filter for noise reduction and anti-aliasing. The use of a single-ended IF gain stage followed by a transformer to perform the single-ended- to-differential conversion is an optimum solution for this application where both low noise and low distortion are required.

The ADL5535/ADL5536 is a high linearity (third order output intercept, OIP3 = +45 dBm at 190 MHz), single-ended, fixed gain amplifier that can be used as a driver for high performance IF sampling of analog-to-digital converters. The ADL5535 has a gain of 16 dB and provides a simple approach to raise the signal from approximately 400 mV p-p to the 2 V p-p full-scale level required by the ADC. The ADL5535 low noise figure (3.2 dB at 190 MHz) and low distortion ensure that the ADC performance is not compromised. The ADL5536 can be used where a gain of 20 dB is required.

Figure 1. Schematic of the ADL5535 Driving the AD9268 16-Bit ADC, (Simplified Schematic: All Connections and Decoupling Not Shown)

CIRCUIT DESCRIPTION

Figure 1 shows the schematic of the ADL5535/ADL5536 driving the AD9268 16-bit ADC clocked at a sample rate of 122.88 MSPS. The ADL5535 has a single-ended input and output impedance of 50 Ω. A 1:1 impedance transformer (M/A-COM BA-007159-000000, 4.5 MHz to 3000 MHz), along with termination resistors and series ferrite beads, is used to present a 50 Ω load for the anti-aliasing filter interface. The filter interface between the ADL5535 and the AD9268 is a sixth-order Butterworth low-pass filter designed using a standard filter program. The interface provides a 50 MHz, 1 dB bandwidth centered around 175 MHz. Following the sixth-order filter, a shunt LC tank circuit (72 nH, 8.2 pF) was inserted to further reduce the low frequency response of the filter, giving more of a band-pass response to the filter. The normalized wideband response is shown in Figure 2.

Figure 2. Normalized Frequency Response of the ADC Interface Shown in Figure 1

The single-tone performance for an input frequency of 170 MHz and a sampling rate of 122.88 MSPS is shown in Figure 3. Two-tone performance is shown in Figure 4.

Figure 3. Measured Single-Tone Performance of the Circuit Shown in Figure 1 for an Input Frequency of 17 0MHz and Sampling Frequency of 122.88 MSPS
Figure 4. Measured Two-Tone Performance of the Circuit Shown in Figure 1 for Input Tones Centered at 170 MHz and a Sampling Rate of 122.88 MSPS

COMMON VARIATIONS

The application circuit described here can be modified for any IF frequency within the operating range of the ADL5535/ADL5536 and the AD9268. As an alternative to the AD9268, the AD9640, the AD6657, or the AD9644 can be used for the ADC in this application.

この回路に使用されている製品&サンプル:

製品 概要 サンプルが入手可能な製品
AD9268 A/Dコンバータ、16ビット、125/105/80MSPS、デユアル、1.8V

To obtain samples of this part, please contact ADI

ADL5535 IFゲインブロック、20 MHz~1.0 GHz ADL5535ARKZ-R7
ADL5536 IFゲインブロック、20MHz~1.0GHz ADL5536ARKZ-R7
沪ICP备09046653号
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