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ADV3203:  300 MHz, 32 × 16 Buffered Analog Crosspoint Switch

Product Details

The ADV3202/ADV3203 are 32 × 16 analog crosspoint switch matrices. They feature a selectable sync-tip clamp input for ac-coupled applications and a 2:1 on-screen display (OSD) insertion mux. With −48 dB of crosstalk and −80 dB isolation at 5 MHz, the ADV3202/ADV3203 are useful in many high density routing applications. The 0.1 dB flatness out to 60 MHz makes the ADV3202/ADV3203 ideal for both composite and component video switching.

The 16 independent output buffers of the ADV3202/ADV3203 can be placed into a high impedance state for paralleling crosspoint outputs so that off-channels present minimal loading to an output bus if building a larger array. The ADV3202 has a gain of +1 while the ADV3203 has a gain of +2 for ease of use in back-terminated load applications. A single +5 V supply, dual ±2.5 V supplies, or dual ±3.3 V supplies can be used while consuming only 195 mA of idle current with all outputs enabled. The channel switching is performed via a double buffered, serial digital control, that can accommodate daisy chaining of several devices.

The ADV3202/ADV3203 are packaged in a 176-lead exposed pad LQFP package (24 mm × 24 mm) and are available over the extended industrial temperature range of −40°C to +85°C.


  • CCTV surveillance
  • Routing of high speed signals
           Composite video (NTSC, PAL, S, SECAM)
           RGB and component video routing
           Compressed video (MPEG, wavelet)
  • Video conferencing
  • Data Sheet, Rev 0, 11/2008


    • Large, 32 × 16, nonblocking switch array
    • G = +1 (ADV3202) or G = +2 (ADV3203) operation
    • 32 × 32 pin compatible version available (ADV3200/ADV3201)
    • Single +5 V, dual ±2.5 V, or dual ±3.3 V supply (G = +2)
    • Serial programming of switch array
    • 2:1 OSD insertion mux per output
    • Input sync-tip clamp
    • High impedance output disable allows connection of multiple devices with minimal output bus load
    • Excellent video performance
      60 MHz 0.1 dB gain flatness
      0.1% differential gain error (RL = 150 Ω)
      0.1° differential phase error (RL = 150 Ω)
    • Excellent ac performance
      Bandwidth: >300 MHz
      Slew rate: > 400 V/µs
    • See data sheet for additional Features

    Functional Block Diagram for ADV3203


    Title Content Type File Type
    ADV3202/ADV3203: 300 MHz, 32 × 16 Buffered Analog Crosspoint Switch Data Sheet (Rev 0, 11/2008) (pdf, 382 kB) Data Sheets PDF
    RAQs index Rarely Asked Questions HTML
    Glossary of EE Terms Glossary HTML

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