The ADCMP604/ADCMP605 are very fast comparators fabricated on the Analog Devices, Inc. proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE − 0.5 V to VCCI + 0.2 V, low noise, LVDS-compatible output drivers, and TTL/CMOS latch inputs with adjustable hysteresis and/or shut-down inputs.
The devices offer 1.5 ns propagation delays with 1 ps rms random jitter (RJ). Overdrive and slew rate dispersion are typically less than 50 ps. A flexible power supply scheme allows the devices to operate with a single 2.5 V positive supply and a −0.5 V to +2.7 V input signal range up to a 5.5 V positive supply with a −0.5 V to +5.7 V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP605, support a wide input signal range with greatly reduced power consumption.
The LVDS-compatible output stage is designed to drive any standard LVDS input. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option.
The ADCMP604 is available in a 6-lead SC70 package, and the ADCMP605 is available in a 12-lead LFCSP.
|Title||Content Type||File Type|
|ADCMP604/ADCMP605: Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply LVDS Comparators Data Sheet (Rev A, 08/2007) (pdf, 386 kB)||Data Sheets|
|Comparators Product Brochure 2007 (pdf, 4991 kB)||Product Selection Guide|
|Power System Management (Spring 2007) (pdf, 1170 kB)||Overview|
|RAQs index||Rarely Asked Questions||HTML|
|Does Analog Devices offer any examples application circuits for Hi Speed Comparators?||FAQs/RAQs||HTML|
|Glossary of EE Terms||Glossary||HTML|
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