MAX9179

Obsolete

Quad LVDS Receiver with Hysteresis

Quad LVDS Receiver with Hysteresis is Designed for Applications Requiring High Data Rates, Low Power Dissipation, and Noise Immunity

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Overview

  • Guaranteed 400Mbps Data Rate
  • 50mV (typ) Hysteresis
  • Overshoot/Undershoot Protection (-1.0V or VCC + 1.0V) on Enables
  • IEC 61000-4-2 Level 4 ESD Tolerance
  • AC Specifications Guaranteed with |VID| = 100mV
  • Single 3.3V Supply
  • Fail-Safe Circuit
  • Flow-Through Pinout
    • Simplifies PC Board Layout
    • Reduces Crosstalk
  • Low-Power CMOS Design
  • Conforms to ANSI TIA/EIA-644 LVDS Standard
  • High-Impedance Inputs when Powered Off
  • Pin Compatible with the MAX9121 and the DS90LV048A
  • Small Thin QFN Package Available
MAX9179
Quad LVDS Receiver with Hysteresis
MAX9179: Pin Configuration
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Hardware Ecosystem

Parts Product Life Cycle Description
Interface Receivers 4
MAX9121 PRODUCTION Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
MAX9122 PRODUCTION Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
MAX9125 Obsolete Quad LVDS Line Receivers with Integrated Termination
MAX9126 Obsolete Quad LVDS Line Receivers with Integrated Termination
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