AD6654:  14-Bit, 92.16 MSPS, 4 & 6-Channel Wideband IF to Base Band Receiver

The AD6654 is a mixed-signal IF to base band receiver consisting of a 14-bit, 92.16 MSPS analog-to-digital converter (ADC) and a four/six channel, multi-mode digital down converter (DDC) capable ...More

To drive this ADC in DC-coupled applications, we suggest ADA4937-1 or ADA4938-1. To drive this ADC in AC-coupled applications, we suggest AD8352 or AD8375.

AD6654:  14-Bit, 92.16 MSPS, 4 & 6-Channel Wideband IF to Base Band Receiver

Product Description

The AD6654 is a mixed-signal IF to base band receiver consisting of a 14-bit, 92.16 MSPS analog-to-digital converter (ADC) and a four/six channel, multi-mode digital down converter (DDC) capable of processing up to six WCDMA (Wideband Code Division Multiple Access) channels. It has been optimized for the demanding filtering requirements of wideband standards such as CDMA2000, UMTS, and TD-SCDMA. The AD6654 is used as part of a radio system that digitally demodulates and filters IF sampled signals.

Product Highlights

  1. Integrated 14-bit, 92.16 MSPS ADC
  2. T/H (track-and-hold amplifier) analog input for excellent IF sampling up to 200MHz
  3. Six Independent Digital Filtering Channels
  4. RMS/Peak power monitoring of the ADC data port and 96dB range AGCs before the output ports
  5. Three programmable RAM coefficient filters, three halfband filters, two fixed coefficient filters, and one 5th order CIC filter per channel
  6. Complex filtering by combining filtering capability of multiple channels
  7. Three 16-bit Parallel output ports operating at up to 200MHz clock
  8. Blackfin® and TigerSHARC® compatible 8/16-bit Microprocessor port
  9. Synchronous Serial communications port is compatible with most serial interface standards, SPORT, SPI, SSR etc.

Features

  • Integrated 14-Bit , 92.16 MSPS ADC
  • IF Sampling Frequencies to 200 MHz
  • Internal 2.4 V Reference, 2.2 Vp-p Analog Input Range
  • Internal Differential Track & Hold Analog Input
  • Processes 4/6 Wideband Carriers Simultaneously
  • Programmable Decimating FIR Filters, Interpolating Half Band
  • Fractional Clock Multiplier to 200 MHz
  • Filters and Programmable AGC Loops with 96dB range
  • Three 16-bit Configurable Parallel Output Ports
  • User Configurable Built in Self Test (BIST) Capability
  • 8/16-bit Microport and Sport/SPI Serial Port Control

Diagrams

AD6654 Diagram
Functional Block Diagram for AD6654

Specifications

Digital TX/RX RX
Input Sampling (MSPS) 92.16MSPS
Digital AGC X
Baseband Interface Parallel
Input Ports 1
Ouput Ports 3
Package BGA

Explore Other Products

Download this Selection Table
(pdf, 22,589 bytes)

Last Updated: 9/2007
DDCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6620 65

1 Channel

(main and diversity)

1 Channel

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

1 Channel with FPGA to finish filtering

2 samples per chip

 1 Channel
AD6624 80

4 Channels

2 samples per symbol

2 Channels

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

1 Channel with FPGA for serial to parallel conversion

2 samples per chip

 4 Channels

1 sample per chip
AD6624A 100

2 Channels with FPGA for serial to parallel conversion

2 samples per chip
AD6634 80

4 Channels

2 samples per symbol

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

2 Channels

4 samples per chip

Digital AGC

4 Channels

1 sample per chip
AD6635 80

8 Channels

2 samples per symbol

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

4 Channels

4 samples per chip

Digital AGC

8 Channels

1 sample per chip
AD6636 150

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip
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DUCs
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6622

75

4 Channels

Serial output

2 Channels

Serial output

1 Channel

Serial output

1 Channel

Serial output

4 Channels

Serial output
AD6623 104

4 Channels

Modulate using I/Q symbols

Direct modulation xPSK

Mode switching

Power Ramping

2 Channels (real output)

Serial output

Includes IIR filter for phase pre-distortion

2 Channels (real output)

Serial output

2 Channels (real output)

Serial output

4 Channels

Serial output

Power Ramping

Direct modulation
AD6633 125

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

Includes IIR filter for phase pre-distortion

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter

6 Channels

Modulated I/Q data

VersaCREST™ Crest Reduction Engine

IF/RF compensation using complex filter
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Integrated ADC/DDC Receivers
Generic Part # MSPS GSM, EDGE/GPRS CDMA2000 UMTS TDS-CDMA
      1x 3x    
AD6652 65

4 Channels

2 samples per symbol

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

2 Channels with some external filtering

4 samples per chip

Digital AGC

4 Channels

1 sample per chip
AD6653 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor
AD6654 92.16

6 Channels

4 / 8 samples per symbol

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

4 samples per chip

Digital AGC

6 Channels

1 / 2 / 4 samples per chip
AD6655 150

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 6 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 4 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor

2 x 12 Channels - external Channelization Filters Required

Fast Level Detect and Power Monitor
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QDUCs
Generic Part # Master Clock (MSPS min) Power Supply Voltage (Vnom) Power Dissipation (mW max) Description
AD9856 200 Single (+3) 1590 200 MHz Quadrature Digital Upconverter With 12-Bit Data Path
AD9857 200 Single (3.3 V) 2029 200 MSPS Quadrature Digital Upconverter with 14-bit Data Path
AD9957 1000 Multi (1.8, 3.3) 1800 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC
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Pricing, Packaging & Availability

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The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.

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