The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.
The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.
The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo head-phones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.
The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.
|Title||Content Type||File Type|
|ADAU1361: Stereo, Low Power, 96 kHz, 24-BitAudio Codec with Integrated PLL Data Sheet (Rev C, 09/2010) (pdf, 1145 kB)||Data Sheets|
|AN-1056: Capless Headphone Virtual Ground Short-Circuit Protection for the ADAU1361 and ADAU1761 Low Power Codecs (pdf, 77 kB)||Application Notes|
|AN-1006: Using the EVAL-ADUSB2EBZ (pdf, 349 kB)||Application Notes|
|UG-119: Evaluation Board User Guide for ADAU1361 (pdf, 653 kB)||User Guides|
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