Add to Signal Chain Designer

AD6655:  IF Diversity Receiver

Product Details


The AD6655 is a mixed-signal intermediate frequency (IF) receiver consisting of dual 14-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS ADCs and a wideband digital downconverter (DDC). The AD6655 is designed to support communications applications where low cost, small size, and versatility are desired.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

ADC data outputs are internally connected directly to the digital downconverter (DDC) of the receiver, simplifying layout and reducing interconnection parasitics. The digital receiver has two channels and provides processing flexibility. Each receive channel has four cascaded signal processing stages: a 32-bit frequency translator (numerically controlled oscillator (NCO)), a half-band decimating filter, a fixed FIR filter, and an fADC/8 fixed-frequency NCO.

In addition to the receiver DDC, the AD6655 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with short latency.

In addition, the programmable threshold detector allows monitoring of the incoming signal power using the four fast detect bits of the ADC with low latency. If the input signal level exceeds the programmable threshold, the coarse upper threshold indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition.

The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.

After digital processing, data can be routed directly to the two external 14-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or as 1.8 V LVDS. The CMOS data can also be output in an interleaved configuration at a double data rate using only Port A.

The AD6655 receiver digitizes a wide spectrum of IF frequencies. Each receiver is designed for simultaneous reception of the main channel and the diversity channel. This IF sampling architecture greatly reduces component cost and complexity compared with traditional analog techniques or less integrated digital methods.

Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.
The AD6655 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

Product Highlights

  1. Integrated dual, 14-bit, 150 MSPS ADC.
  2. Integrated wideband decimation filter and 32-bit complex NCO.
  3. Fast overrange detect and signal monitor with serial output.
  4. Proprietary differential input maintains excellent SNR performance for input frequencies up to 450 MHz.
  5. Flexible output modes, including independent CMOS, interleaved CMOS, IQ mode CMOS, and interleaved LVDS.
  6. SYNC input allows synchronization of multiple devices.
  7. 3-bit SPI port for register programming and register readback.

FEATURES and BENEFITS

  • Chinese data sheet available
  • SNR = 74.5 dBc (75.5 dBFS) in a 32.7 MHz BW at 70 MHz @ 150 MSPS
  • SFDR = 80 dBc to 70 MHz @ 150 MSPS
  • 1.8 V analog supply operation
  • Integrated dual-channel ADC
    Sample rates up to 150 MSPS
  • IF sampling frequencies to 450 MHz
  • Internal ADC voltage reference
  • Integrated ADC sample-and-hold inputs
  • Flexible analog input range: 1 V p-p to 2 V p-p
  • ADC clock duty cycle stabilizer
  • 95 dB channel isolation/crosstalk
  • 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply
  • Integer 1-to-8 input clock divider
  • Integrated wideband digital downconverter (DDC)
    - 32-bit complex, numerically controlled oscillator (NCO)
    - Decimating half-band filter and FIR filter
    - Supports real and complex output modes
  • Fast attack/threshold detect bits
  • Composite signal monitor
  • Energy-saving power-down modes

Functional Block Diagram for AD6655

Of Note ...

To drive this ADC in DC-coupled applications, we suggest ADA4938-1. To drive this ADC in AC-coupled applications, we suggest AD8352 or AD8376.

Documentation

Title Content Type File Type
AD6655: IF Diversity Receiver Data Sheet (Rev B, 01/2014) (pdf, 3181 kB) Data Sheets PDF
AN-1142: Techniques for High Speed ADC PCB Layout  (pdf, 392 kB) Application Notes PDF
AN-0974: Multicarrier TD-SCMA Feasibility  (pdf, 634 kB) Application Notes PDF
AN-878: High Speed ADC SPI Control Software  (pdf, 585 kB) Application Notes PDF
AN-807: Multicarrier WCDMA Feasibility  (pdf, 969 kB) Application Notes PDF
AN-808: Multicarrier CDMA2000 Feasibility  (pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
Application Notes PDF
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs  (pdf, 203 kB) Application Notes PDF
AN-877: Interfacing to High Speed ADCs via SPI  (pdf, 1594 kB) Application Notes PDF
AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual  (pdf, 2124 kB) Application Notes PDF
AN-935: Designing an ADC Transformer-Coupled Front End  (pdf, 363 kB) Application Notes PDF
AN-835: Understanding High Speed ADC Testing and Evaluation  (pdf, 985 kB) Application Notes PDF
AN-812:  MicroController-Based Serial Port Interface (SPI) Boot Circuit (pdf, 452,449 bytes)  (pdf, 441 kB)
This application note describes the operation of a general-purpose, microcontroller-based Serial Port Interface (SPI) boot circuit.
Application Notes PDF
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design  (pdf, 262 kB) Application Notes PDF
AN-742: Frequency Domain Response of Switched-Capacitor ADCs  (pdf, 401 kB) Application Notes PDF
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated  (pdf, 370 kB) Application Notes PDF
Matching An ADC To A Transformer
by Rob Reeder, Analog Devices, Inc.
(Microwaves & RF, 7/2007)
Technical Articles HTML
Two-Chip IF Receiver Prepares For 3G Standards
(Microwaves & RF, 4/2007)
Product Reviews HTML
What is Digital Up/Down Converters: VersaCOMM™? Overview HTML
RAQs index Rarely Asked Questions HTML
Glossary of EE Terms Glossary HTML

Design Tools,Models,Drivers & Software

Title Content Type File Type
ADIsimADC
ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
ADIsim Design/Simulation Tools HTML
AD6655 IBIS Models IBIS Models HTML

Evaluation Kits & Symbols & Footprints

Evaluation Boards & KitsView the Evaluation Boards and Kits page for documentation and purchasing

Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.

Product Recommendations & Reference Designs

Engineered. Tested. Ready to Integrate.
Learn More

SampleSample & Buy

Price, packaging, availability

AD6655 Model Options
Model Package Pins Temp.
Range
Packing,
Qty
Price*(100-499) Price*1000 pcs RoHS View PCN/ PDN Check Inventory/
Purchase/Sample
AD6655ABCPZ-105 Status: Last Time Buy 64 ld LFCSP (9x9mm, 7.5mm exposed pad) 64 Ind Tray, 260 $85.13 $72.36 Y  Material Info PDN Purchase
AD6655ABCPZ-125 Status: Production 64 ld LFCSP (9x9mm, 7.5mm exposed pad) 64 Ind Tray, 260 $99.41 $84.50 Y  Material Info Notify Me Purchase
AD6655ABCPZ-150 Status: Production 64 ld LFCSP (9x9mm, 7.5mm exposed pad) 64 Ind Tray, 260 $116.08 $98.67 Y  Material Info Notify Me Purchase
AD6655ABCPZ-80 Status: Production 64 ld LFCSP (9x9mm, 7.5mm exposed pad) 64 Ind Tray, 260 $56.54 $48.07 Y  Material Info Notify Me Purchase
AD6655ABCPZRL7-125 Status: Production 64 ld LFCSP (9x9mm, 7.5mm exposed pad) 64 Ind Reel, 750 $99.41 $84.50 Y  Material Info Notify Me Purchase
AD6655ABCPZRL7-150 Status: Last Time Buy 64 ld LFCSP (9x9mm, 7.5mm exposed pad) 64 Ind Reel, 750 $116.08 $98.67 Y  Material Info PDN Purchase
Price Table Help

The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.

AD6655 Evaluation Board
Model Description Price RoHS View PCN/ PDN Check Inventory/
Purchase/Sample
AD6655-125EBZ Status: Production Evaluation Board $202.40 Yes -
AD6655-150EBZ Status: Production Evaluation Board $202.40 Yes -

Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.

Check Inventory & Purchase

View Sales and Distribution Offices

沪ICP备09046653号
content here.
content here.

Review this Product

Close