AD9215: 10-Bit, 65/80/105 MSPS 3 V A/D Converter
The AD9215 is a family of monolithic, single 3 V supply, 10-bit, 65/80/105 MSPS analog-to-digital converters. This family features a high-performance sample-and-hold amplifier and voltage reference. ...More
AD9215: 10-Bit, 65/80/105 MSPS 3 V A/D Converter
Product Description
The AD9215 is a family of monolithic, single 3 V supply, 10-bit, 65/80/105 MSPS analog-to-digital converters. This family features a high-performance sample-and-hold amplifier and voltage reference. The AD9215 uses a multistage differential pipelined architecture with output error correction logic to provide 10-bit accuracy at 105 MSPS data rates and guarantee no missing codes over the full operating temperature range.
The wide-bandwidth, truly differential sample and hold amplifier (SHA) allows for a variety of user-selectable input ranges and offsets including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist range. Combined with power and cost savings over previously available analog-to-digital converters, the AD9215 is suitable for applications in communications, imaging, and medical ultrasound.
A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer compensates for wide variations in the clock duty cycle while maintaining excellent performance. The digital output data is presented in straight binary or twos complement formats. An out-of-range signal indicates an overflow condition, which can be used with the most significant bit to determine low or high overflow.
Fabricated on an advanced CMOS process, the AD9215 is available in both a 28-lead surface-mount plastic package and a 32-lead chip-scale package, and is specified over the industrial temperature range (-40°C to +85°C).
- Data Sheet Rev A, 02/2004 (pdf 1416kB)
- (About Data Sheets)
Features
- Single +3 V Supply Operation (2.7 V to 3.3 V)
- SNR = 58 dBc to Nyquist
- SFDR = 77 dBc to Nyquist
- Low Power ADC Core:
- 90 mW at 65 MSPS
- 102 mW at 80 MSPS
- 120 mW at 105 MSPS - Differential Input with 300 MHz Bandwidth
- On-Chip Reference and Sample and
Hold Amplifier - DNL = ±0.25 LSB
- Flexible Analog Input: 1 Vp-p
to 2 Vp-p Range - Twos Complement or Offset Binary
Data Format - Clock Duty Cycle Stablizer
Verified Circuits Using This Part
Verified Circuits are designed for ease of use and proven to work by ADI applications engineers. To learn more about Verified Circuits from ADI, please visit Verified Circuits Home.
Diagrams
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- Symbols and Footprints
Functional Block Diagram for AD9215
10-Bit, 65/80/105 MSPS 3 V A/D Converter
Functional Block Diagram for AD9215
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| Part# | Res | Throughput Rate | # of Inputs | Operating Pwr Diss |
|---|---|---|---|---|
| AD9215-105 | 10 | 105MSPS | 1 | 145mW |
| AD9214-105 | 10 | 105MSPS | 1 | 325mW |
| AD9601-200 | 10 | 200MSPS | 1 | 344mW |
| AD9211-200 | 10 | 200MSPS | 1 | 356mW |
| AD9211-300 | 10 | 300MSPS | 1 | 468mW |
| AD9411 | 10 | 170MSPS | 1 | 1.43W |
| AD9410 | 10 | 210MSPS | 1 | 2.4W |
