CN0601

Overview of Bridge Measurements

A common way to measure weight using electronics is through a resistive load cell which uses a Wheatstone bridge architecture. In the load cell, one or more resistors change resistance when weight is applied. To detect this change, a voltage (or current) called excitation is applied across the bridge, and the resulting output is measured as a differential voltage between the middle points of the bridge (see Figure 2).

 

Load cells typically have two key specifications, as follows:

1. Sensitivity (rated output)—the amount of voltage the loadcell outputs per volt of excitation when fully loaded, usually expressed in mV/V.
2. Rated capacity—the maximum weight the load cell can measure.

 

To find the full output voltage of the load cell, multiply the sensitivity by the excitation voltage. For instance, a load cell with a sensitivity of 2mV/V powered by 5V produces 10mV when the full load is applied.

It is important to understand the following:

• The output signal is directly related to both the applied weight and the excitation voltage.
• For loads less than the rated maximum, the output voltage scales linearly.
• Though techniques exist to improve the linearity of this setup, they are not covered in this circuit note.

Ratiometric Bridge Measurements

For weigh scale design, a ratiometric design is recommended. In a ratiometric setup, the voltage used to excite the Wheatstone bridge is also used as the reference for the ADC, as illustrated in Figure 3.

Because both the bridge excitation and the ADC reference share the same voltage source, any variations in this voltage, whether caused by temperature changes, supply fluctuations, or noise affects both the bridge output and the reference equally. The ADC reference voltage is ratiometric to the load cell output, these variations effectively cancel out, ensuring that the digital output of the ADC remains consistent.

A key advantage of this ratiometric configuration is improved noise immunity. Any noise on the excitation voltage appears identically at both the ADC input and reference terminals, it is cancelled during the conversion process.

6-Wire Bridge

For AC excited designs, a 6-wire bridge is required. A 6-wire bridge helps eliminate errors caused by lead wire resistance. In a six-wire bridge (as shown in Figure 4), two wires are used to provide excitation voltage to the bridge (V_EXCITATION+ and V_{EXCITATION–}), and two wires carry the output signal from the bridge (V_OUT+ and V_OUT–). The ADC measures the differential voltage across the signal wires. The two sense wires (V_SENSE+ and V_SENSE–) are connected directly to the top and bottom of the bridge. These sense wires allow the system to monitor the actual voltage across the bridge, ensuring more precise measurements. The sense wires connect to the reference pins of the ADC.

Key Parameters in Weigh Scale System Design

When designing a weigh scale system, several critical factors must be considered to ensure accurate and reliable performance. These include the internal counts of the system, the dynamic range of the ADC, the noise-free resolution, the output data rate, the overall system gain, and the gain error drift over temperature and time. Each of these parameters plays an important role in achieving precise weight measurements.

Internal Count

In weigh scale systems, the resolution visible to the user, often called the external count, typically ranges from 1:3,000 in basic systems to around 1:10,000 in high-precision designs. For instance, a scale that measures up to 5kg with a resolution of 1:10,000 displays weight changes as small as 0.5g. However, to ensure this level of accuracy is consistently achieved, the internal resolution of the system must be significantly higher. Certain industry standards recommend that the internal count be at least 10 to 20 times greater than the external count. Therefore, for a scale with a 1:10,000 external count, an internal resolution is ideally around 1:200,000 to maintain high accuracy and stability.

ADC Dynamic Range

In weigh scale systems, although high-resolution ADCs are used, the full input range of the ADC is often not utilized.

For example, consider a load cell powered with 5V, which gives a full-scale output of 10mV. If the ADC operates with a 5V reference and a gain of 128, it can accept a full scale signal of 39mV. Therefore, only 25% of the dynamic range is used. As a result, a low noise ADC is critical.

Typically, the ADC performance is three to four times more accurate than the load cell so that the load cell becomes the main error contributor in the system. That means the ADC must support a resolution of about 1:800,000, which requires at least 19 to 20 bits of noise-free resolution.

This shows the practical challenge of using a small input signal range and still meeting high-resolution requirements in a weigh scale system.

Gain and Offset Drift

Industrial weigh scale systems are expected to work reliably across a wide temperature range, often around 50°C. As the temperature changes, the gain of the system (the amount of signal amplification) can drift, and this can cause significant measurement errors.

For example, if the user has a 20-bit system and the ADC has a gain drift of 1ppm/°C, over a 50°C range the system can experience an error of about 50LSB. This means even if the system is accurate at room temperature (25°C) with 1LSB of error, the accuracy can reduce to 50LSB at higher or lower temperatures. Therefore, it is important to choose an ADC with low gain drift when designing weigh scale systems.

Offset drift is the other key concern. An ADC with good offset drift is critical to minimize the error due to offset drift. For example, in a 20-bit system with ADC offset drift of 10nV/°C, the resulting error is only about 1/4 LSB over a 50°C temperature range, which is very small and usually acceptable. Some ADCs include chopping to reduce offset and offset drift further.

Noise-Free Resolution

When checking ADC specifications, a common mistake is confusing RMS noise and peak-to-peak (p-p) noise. In weigh scale systems, the peak-to-peak noise is more important because it defines how many bits of resolution are actually useful and stable; this is called the noise-free resolution.

Noise in an ADC means the smallest signals can get lost in the background fuzz. The noise-free resolution shows how many clear, distinguishable codes the ADC can produce without being affected by noise.

Most ADC data sheets show both RMS noise and noise-free (p-p) resolution. To estimate peak-to-peak noise from RMS noise, multiply by 6.6, which covers 99.9% of the noise range in a standard distribution. For example, if the ADC has 1LSB of RMS noise, the peak-to-peak noise would be about 6.6LSB, and this results in a loss of 2.7 bits of usable resolution.

Output Data Rate

The output data rate, which is how fast the ADC gives a new reading, also affects the resolution. A slower output data rate allows the ADC to average out more noise, which improves accuracy.

For example, with a 2.5V reference and a gain of 128, see as follows:

• At 4.17Hz update rate, the noise-free resolution is 20.5 bits
• At 500Hz, the resolution drops to 16.5 bits

Therefore, for weigh scale applications, it is important to find a balance. The output data rate must be slow enough to achieve good resolution but fast enough to update the LCD display smoothly.

Overview of Ac Bridge Excitation

AC bridge excitation builds on the concept of input chopping. While input chopping reduces the offset and offset drift specifically within the ADC, AC excitation goes a step further by minimizing these errors across the entire measurement system. Instead of applying chopping at the ADC input, AC excitation achieves a similar effect by applying the chopping directly to the bridge sensor.

Input Chopping

Input chopping is a method used to reduce measurement errors in ADCs. It works by flipping the input signal and taking two readings, and then averaging them. This process helps cancel small errors, called offset voltages, in the system and gives a more accurate result.

 

Chopping helps remove offset errors that happen after the chopping circuit, mainly the offset inside the ADC. However, any offset that happens before the chopping is not removed. It stays in the signal and needs to be fixed using offset calibration.

On the other hand, offsets changing slowly after chopping are automatically removed during the chopping process.

AC Bridge Excitation

AC bridge excitation is a method that removes offset errors from the entire measurement system, not just the ADC.

It works like input chopping, but instead of happening inside the ADC, the chopping is performed on the complete signal chain. This gives more accurate results because it removes most of the offset right at the source.

Despite the name, AC bridge excitation does not use a true AC signal. Instead, it uses a DC voltage and simply reverses the polarity (positive to negative and vice versa) during each cycle, as shown in Figure 6. The conversions from each cycle are then averaged to remove the offset.

 

The total offset error (VOE) can come from different sources like the ADC, signal conditioning circuits, or thermocouple effects. As long as this offset changes slowly, the chopping action can dynamically remove it.

It is equivalent to the system doing continuous self-calibration, keeping the measurement accurate.

When AC bridge excitation is used, the reference voltage connections also need to switch. This ensures that the ADC always see the correct polarity.

Figure 7 shows the system setup. With AC excitation, the polarity of the excitation voltage applied to the load cell is reversed in every cycle using external MOSFETs or a bridge driver circuit. This approach removes not only the offset inside the ADC but also system- level offsets from signal conditioning circuits, thermocouples, and parasitic errors. These offsets, modeled as VOE in the system, are effectively cancelled as long as they change slowly compared with the chopping frequency.

The AD4170-4 includes built-in logic signals to control this polarity switching, similar to a chopping technique. It provides non-overlapping control signals (ACX1, ACX1 and ACX2, ACX2) through its GPIO pins (GPIO0 to GPIO3) to safely manage the external transistor switching. The non-overlap time prevents short circuits during polarity changes. These signals must be connected to the gate terminals of matched MOSFETs or a dedicated driver such as the MIC4427.

The two phases which make up AC excitation are the following:

• Phase 1: the GPIO0 pin and GPIO2 pin (controlled by ACX1 and ACX1) turn on their transistors, and GPIO1 and GPIO3 are off.
• Phase 2: the GPIO0 pin and GPIO2 pin are turned off, and GPIO1 and GPIO3 (controlled by ACX2 and ACX2) turn on.

This reverses the polarity of the excitation voltage. The analog input and reference voltage to the ADC are also reversed.

The AD4170-4 averages the conversion results from both phases. Although it is called AC excitation, an actual AC waveform is not applied. Instead, the DC excitation voltage is reversed in polarity across alternate conversion cycles, which effectively simulates AC behavior for removing system-level offsets. The AD4170-4 synchronizes itself to the excitation switching automatically, and the CHOP_ADC bits in the MISCn register are used to enable this mode.

The AD4170-4 supports differential analog inputs and differential reference voltages, which makes it ideal for this setup. The load cell produces a differential voltage between its OUT+ and OUT– pins. For example, if a 5V excitation is applied and the sensor has a sensitivity of 2mV/V, the full-scale output of the load cell is 10mV. The AD4170-4 accepts a reference up to AVDD. Therefore, if the bridge is excited with 5V and the AD4170-4 operates with 5V, the SENSE+ and SENSE- lines can be used directly as the ADC reference. This removes the need for resistor dividers and simplifies the design.

These connections result in a ratiometric configuration that makes the system immune to small changes in the power supply voltage and also removes the need for a separate precision reference.

One challenge with AC excitation is the settling time after each polarity switch, especially in setups with long wires between the load cell and the ADC. To prevent conversion errors due to unstable signals, the DELAY register can be configured to insert a wait time before each conversion, allowing the signal to settle.

The AD4170-4 automatically adjusts the switching frequency of the AC excitation based on the selected output data rate (ODR). This ensures the switching is not faster than necessary, which helps reduce unnecessary power usage and improves system performance.

The small signal from the load cell is first amplified by the internal programmable gain amplifier (PGA) of the AD4170-4. The PGA is set to a gain of 128 to boost the low-level signal to a readable level. After amplification and conversion, the digital output from the AD4170-4 is sent to the PC through a USB connection. On the PC, ACE software is used to process the data and displays the weight measurement in real-time.

To ensure safety, when the AC excitation is not enabled for certain channels, the GPIOs are set to a safe high or low state using the GPIO_MODE register and GPIO_OUTPUT_DATA register. This prevents accidental short circuits when switching between channels with different excitation modes. In standby or power-down modes, the ACX pins are disabled. Therefore, pull-up and pull-down resistors are recommended to hold the transistors in a safe state.

LOAD CELL MEASUREMENTS AND RESULTS

Consider a 2kg load cell with a sensitivity of 2mV/V. If a 5V excitation voltage is used, the load cell gives a full-scale output of 10mV.

Load cells usually have a small built-in offset called tare, which can be as much as 50% of the full-scale signal. There can also be a gain error of up to ±20%. Some users prefer to use a DAC to cancel out the tare.

When using the AD4170-4 with a 5V reference and a gain of 128, its input range is ±40mV in bipolar mode. This is much wider than the 10mV signal from the load cell, which is a good thing because it ensures that even with tare and gain error, the signal does not exceed the ADC range.

The AD4170-4 has an rms noise of 0.01μV and a peak-to-peak noise of 0.062μV when configured with the sinc3 filter and an output data rate of 7.63Hz. The number of noise free counts is equal to

 

The resolution in grams is, therefore, equal to

The noise free resolution is equal to

 

In practice, the load cell introduces some noise. Figure 8 shows the measured output performance when a 1kg weight is placed on the load cell and 500 conversions are gathered.

Figure 8 presents the weight measurement results. Across 500 samples, the output shows a peak-to-peak variation of 0.0212g. This indicates that the weighing system can achieve an accuracy of 0.0212g.