Design Note 339: An Autoranging True RMS Converter

Introduction

The LTC1966 is a true RMS-to-DC converter that uses a ∆Σ computational technique to make it dramatically simpler to use, significantly more accurate, lower in power consumption and more flexible than conventional log-antilog RMS-to-DC converters. The LTC1966 RMS-to-DC converter has an input signal range from 5mVRMS to 1.5VRMS (a 50dB dynamic range with a single 5V supply rail) and a 3dB bandwidth of 800kHz with signal crest factors up to four.

True RMS voltage detection is most commonly required to measure complex amplitude and time varying signals, such as machine or engine vibration monitoring and complex AC power line load monitoring. Sometimes these applications require accurate input signal measurement over an extremely wide dynamic range—even more than the 50dB range of the LTC1966. One solution is to add an autoranging function to the LTC1966, thus effectively expanding the dynamic range of the measuring system. Versatility is certainly an advantage of this approach. Figure 1 shows a true RMS-to-DC autoranging converter which has an input signal dynamic range of 80dB, making it suitable to a wide range of applications.

Figure 1. An Autoranging True RMS-to-DC Converter.

Figure 1. An Autoranging True RMS-to-DC Converter.

Autoranging Expands Input Dynamic Range

The autoranging loop of Figure 1 uses an LTC6910-2 programmable gain amplifier (PGA) to provide gain in front of the LTC1966. Under control of a 3-bit input code, the LTC6910-2 provides gain in binary-weighted increments (gain is set to 1, 2, 4, 8, 16, 32 or 64). An LT1783 op amp follower buffers the LTC1966 DC output and drives an LT6700-1-based window comparator (the LT6700-1 combines two micropower, low voltage comparators with a 400mV reference). The window comparator has two logic outputs that go low when the DC output voltage extends beyond or below two preset threshold levels. The comparator outputs enable the clocking of an up/down counter that increases or decreases the frontend gain of the LTC6910-2 as required. An LTC6900 single resistor programmable oscillator controls the response time of the autoranging loop.

Circuit Description

The entire circuit is biased from a single 5V supply. The input signal is AC coupled with filtering added in the LTC1966 input. The autoranging true RMS-to-DC conversion bandwidth is 12Hz to 32kHz. An LTC1983-5 charge pump inverter provides a negative supply for the input PGA and output buffer. This allows their inputs and outputs to operate linearly to zero volts. The thresholds for the window comparator are set to 9.5mV and 1.5V. At power on it is assumed that there is no input signal present and the PGA gain is set to the maximum value of 64. When an applied signal causes the DC output to exceed the 1.5V down-range threshold, the gain control up/down counter is clocked down by one count. Any gain change is delayed by one second to ensure that the PGA and LTC1966 have plenty of time to settle. The gain continues to clock down until the output signal remains within the window. Conversely when an input signal magnitude is reduced to a level to cause the DC output to fall below the 9.5mV up-range threshold, the gain is clocked up to a higher value. With a maximum front-end gain of 64, signals as low as 150μVRMS are converted. At the minimum gain setting of 1, the input range is 1.5VRMS. For a system to determine the RMS signal level both the DC output and the control code must be read (digital outputs Q3, Q2, Q1 and Q0).

The circuit has three operating conditions, a linear range, an over range and an under range. These three conditions are described as follows:

Linear range: The digital output (Q3, Q2, Q1, and Q0) is in the range 0001 to 0111 and the analog output is within the up-range and down-range voltage range. In the linear range, the input voltage in RMS is equal to the DC output voltage divided by the PGA gain. For example, if the output voltage is 64mV and the digital code is 0111, then the input voltage in RMS is equal to 64mV divided by 64. The circuit’s conversion error is less than 1% for an LTC1966 input voltage range of 50mVRMS to 1.5VRMS and increases to 5% for the lowest input of 9.5mVRMS. The 1% error bandwidth is 6kHz.

Over range: The digital output is 0000, the input signal is too high and the auto range circuit cannot provide less gain. The 0001 to 0000 transition indicates an over range signal condition. The PGA gain in this condition is set to 1.

Under range: The digital output is 1000, the input signal is too low and the auto range circuit cannot provide more gain. The transition of the digital output from 0111 to 1000 indicates an under range signal condition. The PGA gain in this condition is set to the maximum of 64.

Conclusion

The autoranging converter shown here expands the dynamic range of the LTC1966 to 80dB, making it extremely versatile. This useful circuit example combines a variety of special function circuits available from Linear Technology. The LTC1966 true RMS-to-DC converter, the LTC6910-2 programmable gain amplifier, the LT6700-1 window comparator with built-in reference, the LTC6900 resistor programmable oscillator, the LTC1983-5 charge pump voltage inverter and an LT1783 rail-to-rail op amp are all used to handle the analog signal conditioning. The logic block shown on Figure 1 can be implemented with discrete logic, a low cost microcontroller or a portion of an FPGA.

著者

Generic_Author_image

Jim Mahoney

Philip Karantzalis

Philip Karantzalis

Philip Karantzalisは、アナログ・デバイセズのシニア・アプリケーション・エンジニアです。高精度システム・グループに所属しています。入社は1986年で、当初はシグナル・コンディショニング・グループに所属。データ・アクイジション、RF変調器、復調器、ミキサー、ADC、高精度のテスト・システムを対象とし、ベースバンド信号を扱う回路の設計を担当していました。アナログ信号を対象とした回路/システムの設計やテストの業務に1973年から携わっています。ニューヨーク市のRCAインスティテューツ・オブ・エレクトロニクスを卒業。その後、サンフランシスコ州立大学で高等数学を専攻しました。