Simplify On-Board Security Systems and Increase Video Performance with GMSL

質問:

Compared with traditional video transmission links (analog cameras and IP cameras), what technical advantages does the GMSL solution have and what potential possibilities does it bring?

Simplify On-Board Security Systems and Increase Video Performance with GMSL

回答:

Traditional video transmission solutions, such as analog cameras (using CVBS encoding), have a 480i video resolution and are unable to encode control signals or transmit power over coaxial cables. The high latency and high cost of IP cameras also pose design limitations for security customers. The GMSL video transmission solution can transmit a maximum video bandwidth of 12 Gbps, transmitting video signals, control signals, and power over coaxial cables. This means GMSL improves video transmission performance while significantly reducing bill of materials (BOM) costs.

What Is an On-Board Security System

On-board security systems are designed for intelligent monitoring, dispatching, and emergency response of buses, taxis, trucks, and other types of vehicles. The system monitors the vehicle interior and surrounding environment in real time and positions the vehicle with high precision. The system’s video analysis capabilities ensure timely and accurate detection of abnormal driving behavior to immediately alert the driver, protecting them and their passengers from potential accidents. In the event of an incident such as a pickpocket or a traffic accident, video footage containing critical data can be exported to law enforcement agencies as forensic evidence.

On-board security systems usually consist of video recorders, cameras, and monitors. Figure 1 shows a typical block diagram of the system.

Figure 1. An on-board security system block diagram.

A digital video recorder (DVR) is not only a recorder but also a data processing server. It receives signals from outside, such as cameras, IOs, speed pulse, global navigation satellite system (GNSS), etc., stores video recording data in the local hard disk, interacts with users through the monitor and speaker, and communicates with the cloud through a LAN port or 3G/4G/5G. A DVR is usually installed near the driver’s seat. Figure 2 shows an example of a DVR installed in a bus cabin.

Figure 2. An example of an on-board security system in a bus showing the driver seat camera, DVR, and monitors.

Figure 2 also illustrates a camera installed above the driver’s seat for monitoring the driver’s behavior and a camera installed at the front door of the cockpit for monitoring the front door and the aisle. Similarly, a camera will be installed above the door in the cabin to monitor passenger flow and provide the driver with a reference for the timing of closing the door (Figure 3). The monitor/screen is usually installed near the driver’s seat where the driver can easily observe. This monitor provides an interactive interface with the DVR and the entire vehicle safety system, as well as real-time images from cameras at various locations to facilitate the driver's decision-making.

Figure 3. An example of an on-board security system in a bus showing cameras watching the back door.

Figure 4 is another example of a monitor installation that is used to allow passengers to observe the seating situation on the second floor of the bus.

Figure 4. An example of an on-board security system in a bus showing passengers the seating situation on the second floor of a bus.

The vehicle safety system is essentially a closed-circuit television (CCTV) on a vehicle. This system provides the driver with a convenient view to observe the interior of the vehicle and blind spots. It also provides real-time vehicle operation data and images to the remote vehicle command and dispatch center.

Traditional Solutions of Video Recorder, Camera, and Monitor

A common DVR hardware solution is shown in Figure 5. The main signal chain is that the analog video signal of the external analog camera is transmitted to the video analog-to-digital converter (ADC, which is also called a video decoder and the ADC converts/decodes the analog video signal (composite video baseband signal (CVBS), analog high definition (AHD), and transport video interface (TVI)) into digital video signal BT656. Usually, the maximum resolution that CVBS can transmit is 576i, and TVI can transmit 8K12.5p. The same is true for analog audio signals, which are converted into I2S. Usually, the system on chip (SoC) itself has a video output port for outputting the video stream of the user interaction interface. This port is usually HDMI®, VGA, or CVBS.

Figure 5. A typical DVR hardware system block diagram.

Figure 6 illustrates a refined analog camera system that capitalizes on the advanced functionalities of a video processor to enhance image quality. The image sensor captures light and converts it into digital signals. These signals are then fed to the video processor using interfaces such as MIPI, UART/I2C, and GPIO. This processor is pivotal, employing sophisticated techniques like color space conversion to ensure compatibility with various display standards, image correction to adjust for optical distortions, and exposure compensation to optimize image clarity under different lighting conditions.

Figure 6. A typical analog camera hardware block diagram.

Postprocessing, the output is channeled to the TVI/AHD/CVBS encoder. This device encodes the processed signals into standard video formats suitable for transmission over traditional video infrastructures, utilizing a 75 Ω SMA connector to maintain signal integrity.

Additionally, the system includes a power circuit, connected through a power connector to reliably supply electrical power across the setup. For further control and communication enhancements, an RS-232/transistor-to-transistor logic (TTL) low speed connector is integrated, facilitating additional connectivity options.

Figure 7 outlines the architecture of an IP camera system carefully designed to transform raw sensory data into digital images, ready for processing and analysis by a camera controller. Starting from the sensor, which captures visual data from the environment, the journey of the data through the camera system is both complex and intricately optimized.

Figure 7. A typical IP camera hardware block diagram.

The first stage of processing occurs in the MIPI PHY, where the initial digital conversion of the sensor’s output takes place. This interface decodes the image MIPI packets into pixel level for analyzing and adjusting by the camera controller.

From there, the data progresses to the camera controller, a vital component that orchestrates the flow of data and prepares it for further processing. Connected to this is the media access control (MAC) Ethernet PHY, which manages network communication. It handles how data packets are formatted, addressed, and sent over networks, enabling the camera to interface seamlessly with networked systems.

Finally, another Ethernet PHY stage further prepares the data for final processing by the SoC, which integrates all the incoming information, executing complex computations and making decisions based on the integrated video data. This sophisticated flow ensures that the IP camera system not only captures images but also does so in a way that is ready for immediate use in security, monitoring, and analytical applications, highlighting the system’s capability to handle data efficiently and effectively in real-time environments.

The cables for analog cameras require 75 Ω coaxial cables to transmit analog video signals, and independent power cables to transmit power and additional RS-232 or RS-485 control signals. See Figure 8.

Figure 8. Coax cable for an analog camera.

The cables for the IP camera are standard Ethernet cables like CAT3 or CAT5. An additional power cable is needed if power over Ethernet (PoE) is not supported. The Ethernet cable is built from four twisted pairs (Figure 9). The twist reduces signal interference.

Figure 9. An Ethernet cable for an IP camera.

Figure 10 shows the monitor system block diagram, which delineates a sophisticated framework engineered to manage and display video signals efficiently. Central to this block diagram is the controller, which orchestrates various inputs and outputs to ensure seamless operation.

Figure 10. A typical monitor hardware block diagram.

Starting from the left, an AVI connects to the system through a 75 Ω connector. This analog video signal is then fed into a TVI/AHD/CVBS decoder, which is adept at converting diverse video formats into a standardized digital output, facilitating further processing.

The controller, connected via I2C interfaces, handles this digital data and is the nexus for several critical pathways. It communicates directly with the LCD and its touch IC. The controller manipulates image properties such as brightness through pulse width modulation (PWM) dimming and processes touch screen inputs from the touch panel, enhancing user interaction with the display.

Additional communication interfaces include RS-422/TTL and GPIO, enabling robust long-distance data transmission and general input/output tasks, respectively. These features are crucial for interactive tasks such as controlling the display settings or integrating additional functionalities.

Note that in addition to the cables for transmitting dot-to-dot and analog video signals, the cables for connecting the monitor also require cables for transmitting RS-422 signals (Figure 11).

Figure 11. RS-422 connector pin signal.

The traditional CCTV hardware solution requires multiple cables, including video codec, coaxial cable or Ethernet cable, power cable, and control signal (RS-422/RS-485/RS-232) cable. This can make installation complicated and expensive.

Features of GMSL Can Be Applied in On-Board Security Systems

Cameras and displays are constantly growing in numbers and image quality, requiring higher data rates for video transport. Analog Devices’ Gigabit Multimedia Serial Link (GMSL) supports these trends and simplifies the system architecture in this process. GMSL links and transports video from cameras to computers, between computers, and from computers to displays. Innovation in GMSL continues with the next generation, further enabling advanced features and capabilities for higher performance computer and software-defined applications.

The transition from one GMSL generation to the next is easily resolved by making the new GMSL generation backward compatible with the previous generation.

GMSL transports every signal (MIPI-CSI, I2C, GPIO, etc.) that the advanced driver assistance system (ADAS) sensor requires over a single coax or STP cable, and GMSL-connected cameras typically require only a single connector for video, power supply, controls, synchronization, haptics, touch, software updates, status reporting, and more as shown in Figure 12. This results in a substantial reduction in weight, energy, A/V cost, and complexity.

Figure 12. A typical GMSL hardware block.

Our solutions are performance leaders in the SERDES market with data rates up to 12 Gbps in mass production today. With over 100 optimized parts, GMSL ensures success across small system form factors and low power requirements.

ADI has expanded the broad market GMSL portfolio for camera and display applications. Table 1 shows the main parameters and features of our latest GMSL2/GMSL3 serializers. Table 2 shows the main parameters and characteristics of the GMSL2/GMSL3 deserializer. The video interfaces supported are LVDS, HDMI, and MIPI CSI-2. The MAX9295D can be paired with devices marked backward compatible GMSL1 in Table 1.

Table 1. Serializers with Parameters
Feature MAX96717 MAX96793 MAX96751
Product Family GMSL2 GMSL3 GMSL2
Product Type Camera Camera Display
Max FW Link Rate 6 Gbps
(Version F and R for 3 Gbps)
12 Gbps 6 Gbps
GMSL Links 1 1 2
Video Interface CSI-2 DPHY,
2.5 Gbps/lane
CSI-2 DPHY,
2.5 Gbps/lane;
CSI-2 CPHY,
3.42 Gbps/lane
HDMI 1.4/2.0,
1 port × 4 lanes,
with HDMI audio
Video Port
Configuration (DPHY)
1 port × 4 lanes 1 port × 4 lanes
Video Port
Configuration (CPHY)
1 port × 2 lanes
Package Size 5 mm × 5 mm, 32-lead 5 mm × 5 mm, 32-lead 8 mm × 8 mm, 56-lead
Backchannel I2C/UART/SPI I2C/UART/SPI I2C/UART/SPI/I2S
ASIL Rating ASIL-B ASIL-B ASIL-B
Watermark     Yes
Temp Grade –40°C to +105°C –40°C to +105°C –40°C to +105°C
Table 2. Deserializers with Parameters
Feature MAX96716A MAX96724 MAX96792A MAX96752
Product Family GMSL2 GMSL2 GMSL3 GMSL2
Product Type Camera Camera Camera Display
GMSL Links 2 4 2 2
Max FW Link Rate 6 Gbps 6 Gbps 12 Gbps 6 Gbps
Video Interface DPHY,
2.5 Gbps/lane

CPHY,
4.56 Gbps/lane
DPHY,
2.5 Gbps/lane

CPHY,
5.7 Gbps/lane
DPHY,
2.5 Gbps/lane

CPHY,
5.7 Gbps/lane
OLDI

1 port × 4 lanes,
2 ports × 4 lanes,
1 port × 8 lanes
Video Port
Configuration (DPHY)
2 ports × 4 lanes 2 ports × 4 lanes,
4 ports × 2 lanes,
1 port × 4 lanes +
2 ports × 2 lanes
2 ports × 4 lanes
Video Port
Configuration (CPHY)
2 ports × 2 lanes 2 ports × 4 lanes,
4 ports × 2 lanes,
1 port × 4 lanes +
2 ports × 2 lanes
2 ports × 2 lanes
Package Size 7 mm × 7 mm,
48-lead
8 mm × 8 mm,
56-lead
7 mm × 7 mm,
48-lead
8 mm × 8 mm,
56-lead
Backchannel I2C/UART/SPI I2C/UART I2C/UART/SPI I2C/UART/SPI/I2S
ASIL Rating ASIL-B ASIL-B ASIL-B ASIL-B
Temp Grade –40°C to +105°C –40°C to +105°C –40°C to +105°C –40°C to +105°C

Benefits and Potentialities Brought by the GMSL Scheme

The max forward link rate in Table 1 and Table 2 refers to the bit rate encoded by the GMSL protocol on the serial link. At the same time, control signals such as I2C/UART/GPIO are also transmitted. The performance parameters of some mainstream surveillance camera solutions competitive with GMSL solutions on the market are compared in Table 3.

Table 3. Comparison 3 Camera Solutions
Solution Analog Camera IP Camera GMSL Camera
Coding Scheme CVBS/TVI H.264/H.265 GMSL
Max Resolutions CVBS: 576i (PAL)

TVI: 8 M, 12.5 P
4k, up to 8k GMSL3: 8 MP, 60 P

GMSL2: 8 MP, 30 P
Video Latency CVBS: ~60 ms

TVI: ~100 ms
200 ms to 500 ms Very low and deterministic microseconds
Control Data over Cable CVBS: No

TVI: Yes, only I2C
Yes Yes, I2C/UART/SPI/GPIO
Power over Cable Not supported PoE, complex, active components PoC, simple, passive network
Hardware Complexity Complex camera design Complex camera design Simplified camera design

A hardware block diagram of the GMSL camera system is shown in Figure 13.

Figure 13. A typical GMSL camera hardware system.

Compared with Figure 6 and Figure 7, the GMSL SERDES solution greatly reduces the number of components required for the camera module. GMSL SERDES can transmit I2C/UART/SPI/GPIO bidirectionally at the same time, which allows the SoC to access other peripherals of the remote image sensor through GMSL, such as inertial measurement units (IMUs), G-sensors, LED controllers, and other pan/tilt/zoom (PTZ) control signals. The latency of the GPIO is in microseconds, which allows users to trigger a single frame through the GPIO. The external interface of the GMSL camera only requires a 50 Ω coaxial cable or a pair of shielded twisted pairs.

The MAX96717/MAX96793 series supports a reference clock over reverse channel (RoR), which is the clock transmitted from the deserializer in the reverse channel, allowing the crystal oscillator to be omitted on the sensor board (Figure 14). The removal of the crystal oscillator in the RoR provides several advantages: reduced system cost, increased reliability, reduced crystal, and simplified board layout.

Figure 14. A RoR signal chain diagram.

As can be seen from Figure 13 and Figure 15, the GMSL SERDES video interface and control interface are directly connected to the image sensor and LCD panel, eliminating the need for MCU, video codec, RS-485/RS-232 drivers and receivers, and other connectors. The GMSL SERDES solution also provides greater video bandwidth, ultralow and deterministic video latency, extremely simple hardware design, and an external interface with only one low cost coaxial or STP cable.

Figure 15. A typical GMSL display hardware system.

Conclusion

The GMSL SERDES solution is a powerful alternative to existing vehicle-mounted DVR solutions, reducing the cost of on-board materials and cables while providing higher video bandwidth and lower video latency.

References

1 “Understanding Analog Video Signals.” Analog Devices, Inc., September 2002.

2 Ferenc Barany. “AN-945: System Bandwidth vs. Resolution for Analog Video.” Analog Devices, Inc., November 2007.

3 Kainan Wang. “Gigabit Multimedia Serial Link (GMSL) Cameras as an Alternative to GigE Vision Cameras.” Analog Dialogue, Vol. 57, December 2023.

著者

Yaxian Li

Yaxian Li

Yaxian Liは、アナログ・デバイセズのアプリケーション・エンジニアです。2020年にMaxim Integrated(現在はアナログ・デバイセズの一部門)に入社しました。現在はトレーニング&テクニカル・サービス・グループに所属。主にGMSLとRF技術を担当しています。2018年に杭州電子科技大学で電気工学/オートメーションに関する学士号を取得。特技はバドミントンと水泳です。