Whether squeezing the last millijoule from your battery or operating a cooler CPU board, the goal is to burn less power. For many loads the power dissipation varies as the square of the applied voltage, so one approach is simply to minimize the supply voltage. Power dissipation equals V²/R in a resistive load and CV²F in a CMOS load, where C is the internal CMOS capacitance and F is the frequency.
The consequence of this square law dependency is a 2% change in power dissipation for every 1% change in voltage. Clearly, tight power control is a consequence of tight voltage control. To achieve that goal, the circuit of Figure 1 produces an output voltage whose accuracy is far tighter than that of the DCDC converter's internal voltage, and without need for precision external resistors.
Figure 1. Substituting a shunt regulator (U2) for the customary resistive divider in this DCDC converter dramatically improves the output voltage accuracy.
To determine the optimum supply voltage, you must consider the circuit's minimum voltage requirement, the DCDC converter's output ripple and line/load regulation, and any voltage drops between the converter and its load(s). One would ideally set the powersupply output to the resulting minimum, but actual DCDC converters have nonideal references whose percent error appears directly in the output. The tolerances on discretevalued external resistors also contribute an output voltage error. The circuit of Figure 1 (and the modifications shown in Figure 2) describe a technique that almost eliminates the potentially significant errors contributed by a resistive feedback divider. It also minimizes error due to variation in the internal reference voltage.
Figure 2. To adjust the output voltage, add R_{tweak} to the Figure 1 circuit to either increase V_{out} (a) or decrease V_{out} (b), as indicated by the equations.
The Figure 1 circuit is that of the MAX1644 Evaluation Kit, except that the output divider has been replaced with bias resistor R_{bias} and a 0.1%accurate 2.048V shunt regulator (U2). The DCDC converter's output voltage is the sum of the shunt voltage and the internal reference voltage at the feedback point. The MAX1644 reference voltage is 1.10V ± 11mV (which is ±1%), and the MAX6138 shunt reference voltage is 2.048V ±2mV. The circuit's output voltage is therefore 3.148V ±13 mV (which is ±0.4%). If we assume that output power varies as the square of the voltage, then it varies by ±0.8%, which is a range of 1.6%.
Note that the outputvoltage accuracy (±0.4%) is better than the DCDC converter's referencevoltage accuracy (±1%). That result cannot be achieved with a resistor string, even one with perfect resistors, nor can it be achieved even with the output tied directly to the internal reference.
An output of 3.148V 0.4% is almost exactly 3.3V 5%, which may be optimum for many 3.3V systems. For other values of output voltage, consider Figures 2a and 2b. Figure 2a adds a resistor (R_{tweak}) in series with the shunt reference, thereby raising the output voltage by an amount VFB × R_{tweak}/11.5kΩ. If R_{tweak} is small it will have a negligible effect on output voltage accuracy. If the output voltage is too high, you can lower it using the circuit of Figure 2b. Here again, small values of R_{tweak} will have a negligible effect on output voltage accuracy. Note that the R_{bias} value should be small enough to provide for U2 a minimum bias current of 65µA.
To compare the output accuracy of Figure 1 with that of a 3.148V DCDC converter featuring a simple resistive divider in the feedback path (Table 1), consider a 143k/76.8k divider using 1% resistors. Assuming a 1.1V reference in the converter IC, the worstcase variation in output voltage due to the resistor tolerance is approximately ±1.3%. Any variation in the reference (±1%, in this case) is seen directly in the output voltage. Thus, adding the two independent sources of error (±1.3% and ±1%) yields an outputvoltage variation of ±2.3%, producing a power variation of ±4.6% (a range of 9.2%).
Table 1 3.148V DCDC converter featuring 1% resistor divider vs. 0.1% shunt
V_{out}/V_{ref}

V_{out}
error due to DCDC ref. error

V_{out}
error due to ±1% resistors

V_{out}
error due to shunt ref. error

Total
V_{out} error

Total
loadpower error

Total
loadpower range


With 1% resistor string

3.148 /1.1

±31.5mV
= ± 1.0% 
~±41mV
= ± 1.3% 
0

± 72.5mV
= ± 2.3% 
± 4.6%

9.2%

With 0.1% shunt

3.148 /1.1

± 11mV
= ± 0.35% 
0

± 2mV
= ± 0.064% 
± 13mV
= ± 0.41% 
± 0.82%

1.64%

A sensitivity analysis of the resistordivider circuit reveals why its power range is more than five times that of the shunt circuit:
where R_{top} is the top resistor, R_{bot} is the bottom resistor, and V_{fb} is the internal reference voltage.
The above equation relates the fractional change in V_{out} to fractional changes in R_{top}, R_{bot} and V_{fb}. If R_{top} = R_{bot}, for example, then a +1% change in R_{top} causes a +0.5% change in V_{out}. Note that a 1% change in V_{fb} causes a 1% change in V_{out} that is independent of the resistor values. The equation demonstrates that even with perfect resistors (dR_{top} = dR_{bot} = 0) the fractional change in output voltage can never be better than the fractional change in V_{fb}. When using a resistor divider, the outputvoltage accuracy can never be better than the accuracy of the DCDC converter's internal reference. Resistor errors can only worsen the accuracy.
The output voltage of Figure 1 has no resistor sensitivity. What's more, the shunt reference acts as a level translator. If V_{fb} has an error of ±11mV, the error translates directly to the output, where it appears as a ±1% error of the 1.1V internal reference, not of the output voltage. That is the beauty of this arrangement: the ±11mV error is only ±0.35% of the 3.148V output.
Changing the shunt can accommodate other output voltages. The 2.048V shunt provides 3.3V 5%, and a 1.2205V shunt (MAX6138AEXR12) generates an output voltage of 2.3205V, which is 2.5V 7.2%. The circuits of Figures 2a and 2b can introduce minor adjustments if necessary. Other shunt reference voltages can be used for other output voltage requirements.
The circuit of Figure 1 was tested with a 1.2205V reference and then with a 2.048V reference, applying DC tests with different loads and AC tests with a dynamic load under various static and dynamic conditions. The circuit exhibited a fast response with no overshoot or ringing, and was stable without use of additional compensation. The turnon transients were also wellbehaved under various load conditions. All tests were conducted with the FBSEL pin connected to the reference (as shown in Figure 1), and then with the FBSEL pin connected to ground. For highly accurate outputs that improve the output load regulation by 50%, connect the FBSEL pin to ground.
These simple circuits can provide surprisingly large savings in power dissipation and battery life.