AN-1585: Extending the Capacitive Input Range of the AD7745/AD7746 Capacitance-to-Digital Converter

Circuit Function and Benefits

The circuit shown in Figure 1 provides a method to extend the capacitive input range of the AD7745/AD7746 capacitance-to-digital converter (CDC). This application note describes the use of the on-chip digital-to-capacitance converter (CAPDAC) to minimize the range extension factor of the circuit and how to optimize the circuit to achieve optimal performance. The AD7745 has one capacitance input channel and the AD7746 has two of these channels. Each channel can be configured as single-ended or differential.

Figure 1. AD7745 Capacitive Input Range Extension Circuit (Simplified Schematic, All Connections Not Shown).

Circuit Description

The AD7745/AD7746 CDCs measure capacitance with switching capacitor technology to build a charge balancing circuit. Charge (Q) is proportional to the product of voltage (V) and capacitance (C), Q = V × C. Therefore, the conversion result represents the ratio between the input capacitance (CSENS) and the internal reference capacitance (CREF). The excitation voltages (EXCA and EXCB) and the internal reference voltage (VREF) have fixed known values.

The range extension circuit ensures that the charge transfer within the input capacitance remains within the input range of the AD7745/AD7746. To achieve this value, the excitation voltage needs to be decreased by a factor of F, so that the input capacitance connected to the input can be increased by a factor of F.

The AD7745/AD7746 have two independent excitation voltage sources, EXCA and EXCB. For the range extension, the excitation sources have to be set up in a way that EXCB is the inverse of EXCA. The R1 and R2 resistors are connected as shown in Figure 1 and the resulting range extension factor (F) is the ratio of the AD7746 excitation voltage between EXCA and EXCB (VEXC(A−B)) and the attenuated excitation voltage (VEXCS) at the positive input of the AD8515 op amp.

The range extension factor can be calculated with the following equation:

Equation 1.

where R1 and R2 are the resistor values of the R1 and R2 capacitors.

Using both excitation sources results in a mean voltage of the attenuated excitation voltage (VEXCS) of approximately VDD/2.

The AD8515 op amp functions in the circuit as a low impedance source to ensure that the sensing capacitance is fully charged when the AD7745/AD7746 begins sampling.

Characteristics Of Capacitive Humidity Sensor

An example of a common capacitive, polymer humidity sensor element is used to explain the required calculation and considerations for the input range extension of the AD7745/AD7746. The typical technical data of this capacitive sensor element is shown in Table 1.

Table 1. Typical Technical Data for Capacitive Sensor Element
Parameter Parameter
Parameter 0% to 100% relative humidity (RH)
Bulk Capacitance 150 pF ± 50 pF (at 23°C and 30% RH)
Rate of Rise 0.25 pF/% RH

Calculating the Required Range Extension Factor

To calculate the extension factor, the user must first discern which of the sensor parameters is the main contributor for the required range extension.

The bulk capacitance of the sensor can be as high as 200 pF, which results in a required range extension factor as follows:

Equation 2.

where FFIX is the range extension factor.

The dynamic range of the sensor (CDYN) can be calculated with the following equation:

Equation 3.

The range extension factor required for the dynamic range (FDYN) is calculated as follows:

Equation 4.

The calculations in Equation 2 to Equation 4 show that the bulk capacitance of the sensor is the parameter that determines the range extension factor. Therefore, F = 11.76, which is the value used in the remainder of the calculations for this application.

R1 and R2 Resistor Value Selection

A value of 100 kΩ was chosen for R1.

The resistor value for R2 is calculated and rounded down to the next value in the standard E96 series of resistors with the following equation:

Equation 5.


Equation 6.

The resistor values (100 kΩ for R1 and 118 kΩ for R2) result in a range extension factor that can be calculated with the following equation:

Equation 7.

Using the CAPDAC

The AD7745/AD7746 have CAPDACs that can be used to compensate for the bulk capacitance of a sensor element. For the AD7745/AD7746, the CAPDACs have a full-scale value of 17 pF minimum and 21 pF typical. Therefore, for a given CAPDAC setting, the capacitances can vary significantly from device to device.

The reason for this variance is that the AD7745/AD7746 on-chip capacitances can vary with the production process from batch to batch. However, the ratio variation between the on-chip capacitances is small.

The AD7745/AD7746 capacitive input is factory calibrated, and the calibration factor (FGAIN_CAL) is stored in the Cap Gain Calibration register.

The calibration factor stored in the Cap Gain Calibration register can be calculated with the following equation:

Equation 8.

where GAIN_CAL is the digital code value that is stored in the Cap Gain Calibration register.

The internal reference capacitance (CREF) can be defined as the product of the allowed full range input capacitance of the AD7745/AD7746 and the gain calibration factor.

Equation 9.

The AD7745/AD7746 are designed so that the ratio between full range CAPDAC capacitance (CCAPDAC) and internal reference capacitance is 3.2. Therefore, the full range of the CAPDAC can be calculated as follows:

Equation 10.

If the gain calibration factor is 1.4, the resulting CREF and CCAPDAC values are as follows:

Equation 11.

where CLSBCAPDAC is the capacitance of 1 LSB.

The range extension circuit ensures that the charge transfer within the sensing capacitance remains within the input range of the AD7745/AD7746. When the CAPDAC takes a charge from the sensing capacitance at the CIN1± or CIN2± input, a decrease in measured capacitance occurs. This measured capacitance (CDAC_EFF) is used to compensate for the bulk capacitance of a sensor. One LSB of the CAPDAC capacitance represents compensation on the sensing capacitance, as calculated in the following equations:

Equation 18

Calculating the Required Capdac Setting

The CAPDAC has some dynamic nonlinearity (DNL). It is recommended to set up the CAPDAC to have the intended calibration point of the application at zero-scale of the capacitive input range. The remaining offset can then be calibrated by using the available system offset calibration function.

The required CAPDAC setting for the humidity sensing element example is calculated as follows:

Equation 13.

DACSET is the digital code value required for a range of 0 pF to 150 pF.
CSENSOR is the capacitive component that requires range extension. In this case, CSENSOR indicates the bulk capacitance.

Equation 14.

A system offset calibration compensates for the remaining offset.

Measurement Using the Range Extension Circuit

An AD7746 demo board with a range extension circuit was used to perform the measurements. A variable capacitance was used during the measurement. The board was connected to a standard EVAL-AD7746 evaluation board. The standard EVALAD7746 evaluation board software was used to configure the AD7746 and to read the conversion results. These circuits must be constructed on a multilayer printed circuit board (PCB) with a large area ground plane. Proper layout, grounding, and decoupling techniques must be used to achieve optimal performance (see Tutorial MT-031, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND" and Tutorial MT-101, Decoupling Techniques).

The variable capacitance was set to a defined value using a precision inductance, capacitance, resistance (LCR) meter. This capacitance was then connected to the range extension board, where the CAPDAC was set to the calculated value of this defined bulk capacitance (CBULK). A system offset calibration was performed to have the zero point at CBULK.

For each measurement taken, the capacitance was set to the desired value using the LCR meter, and then connected to the range extension board measuring the capacitance seen by the AD7746. Finally, the extended capacitance value was calculated using the factor resulting from the measured resistor values. The following bulk capacitance values were used: CBULK = 100 pF, 150 pF, and 200 pF.

Calculations for the Range Extension Circuit

From the R1 and R2 Resistor Value Selection section, the required resistor values are 100 kΩ and 118 kΩ. The resistors used were measured and had the following values: R1 = 100.004 kΩ and R2 = 118.060 kΩ.

The resulting range extension factor (F) is calculated with the following equation

Equation 15.


Equation 19

Calculating the dynamic capacitive input range,

Equation 20

The resulting range for the measurement is ±45 pF in steps of +15 pF.

Calculating the gain calibration factor value gives a value of 0x5FBD = 24509.

Equation 16.

Resulting CAPDAC values and settings are as follows:

Equation 17.

DACSET100 is the digital code to set the DAC to 100 pF.
DACSET150 is the digital code to set the DAC to 150 pF.
DACSET200 is the digital code to set the DAC to 200 pF.

Measurement Errors

Figure 2 shows that the measurement of the errors caused by the range extension circuit is not dependent on the bulk capacitance value measured, rather, it is dependent on the range extension circuit itself. All three measurements show similar behavior and are linear, which indicates that the error caused by the range extension circuit can be compensated for in software calibration.

Figure 2. Gain Error vs. Measured Capacitance.