MAX9163

Bus LVDS 3.3V Single Transceiver

3.3V, High-speed Bus LVDS Transceiver Designed Specifically for Heavily Loaded Multipoint Bus Applications

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Overview

BLVDS Signaling
3.3V Operation
Low-Power CMOS Design
200Mbps Data-Signaling Rate
±1V Common-Mode Range
±100mV Receiver Sensitivity
Flow-Through Pinout
Receiver Output High for Undriven Open, Short, or Terminated Input
8-Lead SO Package

The MAX9163 high-speed bus low-voltage differential signaling (BLVDS) transceiver is designed specifically for heavily loaded multipoint bus applications. The MAX9163 operates from a single 3.3V power supply, and is pin compatible with the DS92LV010A. The transceiver consists of one differential BLVDS line driver and one LVDS receiver. The driver output and receiver input are connected internally to minimize bus loading. The individual enable logic inputs (DE, active-low RE) are used to enable the driver or the receiver.

The MAX9163 driver output uses a current-steering configuration to generate a 9mA (typ) drive current. The driver accepts a single-ended input and translates it to a differential output level of 243mV (typ) into 27Ω at speeds up to 200Mbps. The MAX9163 receiver detects a differential input as low as 100mV and translates it to a single-ended output at speeds up to 200Mbps. The receiver input features a fail-safe circuit that sets the receiver output high when the receiver inputs are undriven and open, terminated, or shorted.

The MAX9163 is offered in an 8-lead SO package, and is specified for operation from -40°C to +85°C.

Applications