HMCAD1051-80

LAST TIME BUY

Single 13/12-Bit 65 to 80 MSPS A/D Converter

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Overview

13-Bit Resolution
65/80 MSPS Maximum Sampling Rate
Ultra-Low Power Dissipation: 50/60 mW
72 dB SNR @ 8 MHz FIN
Internal Reference Circuitry

1.8 V Core Supply Voltage
1.7 - 3.6 V I/O Supply Voltage
Parallel CMOS Output
6 × 6 mm 40-Pin QFN (LP6HE) Package

The HMCAD1051-80 is a high performance ultra low power analog-to-digital converter (ADC). The ADC employs internal reference circuitry, a CMOS control interface, CMOS output data and is based on a proprietary structure. Digital error correction is employed to ensure no missing codes in the complete full scale range.

Two idle modes with fast startup times exist. The entire chip can either be put in Standby Mode or Power Down mode. The two modes are optimized to allow the user to select the mode resulting in the lowest possible energy consumption during idle mode and startup.

The HMCAD1051-80 has a highly linear THA optimized for frequencies up to Nyquist. The differential clock interface is optimized for low jitter clock sources and supports LVDS, LVPECL, sine wave and CMOS clock inputs.

Pin compatible with HMCAD1041-40, HMCAD1041-80 and HMCAD1051-40.

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