DS21Q55N
Quad T1/E1/J1 Transceiver
Part Details
- Complete T1/DS1/ISDN-PRI/J1 Transceiver Functionality
- Complete E1 (CEPT) PCM-30/ISDN-PRI Transceiver Functionality
- Long-Haul and Short-Haul Line Interface for Clock/Data Recovery and Waveshaping
- CMI Coder/Decoder for Optical I/F
- Crystal-Less Jitter Attenuator
- Fully Independent Transmit and Receive Functionality
- Dual HDLC Controllers
- Programmable BERT Generator and Detector
- Internal Software-Selectable Receive and Transmit-Side Termination Resistors for 75Ω /100Ω /120Ω T1 and E1 Interfaces
- Dual Two-Frame Elastic-Store Slip Buffers that Connect to Asynchronous Backplanes Up to 16.384MHz
- 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz Clock Output Synthesized to Recovered Network Clock
The DS21Q55 is a quad software-selectable T1, E1, or J1 MCM device for short-haul and long-haul applications. Each port is composed of a line interface unit (LIU), framer, HDLC controllers, and a TDM backplane interface, and is controlled by an 8-bit parallel port configured for Intel or Motorola bus operations. The DS21Q55 is software compatible with the DS2155 single-chip transceiver. It is pin compatible with the DS21Qx5y family of products.
Applications
- Channel Banks
- Channel Service Units (CSUs)
- Data Service Units (DSUs)
- DSL Add/Drop Multiplexers
- Muxes
- Routers/Switches
- Routers/Switches
- T1/E1 Test Equipment
Documentation
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Product 6 | ||
| DS2155 | T1/E1/J1 Single-Chip Transceiver | |
| DS21Q50 | LAST TIME BUY | Quad E1 Transceiver |
| DS21Q552 | Quad T1/E1 Transceiver (3.3V, 5.0V) | |
| DS21Q554 | Quad T1/E1 Transceiver (3.3V, 5.0V) | |
| DS21Q352 | Quad T1/E1 Transceiver (3.3V, 5.0V) | |
| DS21Q354 | Quad T1/E1 Transceiver (3.3V, 5.0V) |
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