DS21Q354

Quad T1/E1 Transceiver (3.3V, 5.0V)

Part Details

DS21Q352, DS21Q354, DS21Q552, DS21Q554: Schematic slide

DS21Q352, DS21Q354, DS21Q552, DS21Q554: Schematic

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Features

Four completely independent T1 or E1 transceivers in one small 27mm x 27mm package
Each transceiver contains a short and long haul line interface plus a full featured framer with alarm detection/generation, elastic-stores, hardware based signaling support, per DS0 channel control and HDLC controller
Each multi-chip module (MCM) contains four die of
- DS21352 (DS21Q352)
- DS21552 (DS21Q552)
- DS21354 (DS21Q354)
- DS21554 (DS21Q554)
See the specific DS21352/DS21552 and DS21354/DS21554 data sheets for details on their feature set and operation
All four T1 or E1 transceivers can be concatenated into a single 8.192MHz backplane data stream
IEEE 1149.1 JTAG-Boundary Scan architecture
DS21Q352/DS21Q552 and DS21Q354/DS21Q554 are pin compatible to allow the same footprint to support T1 and E1 applications
256-pin MCM BGA package (27mm X 27mm)
Low power 5V CMOS or low power 3.3V CMOS with 5V tolerant input and outputs

Additional Details

The quad T1 and E1 transceiver MCMs offer a high density packaging arrangement for the DS21352/DS21552 T1 single-chip transceivers and the DS21354/DS21554 E1 single-chip transceivers. Four silicon die of one of these devices is packaged in a multi-chip module (MCM) with the electrical connections as shown in Figure 1 in the data sheet. All of the functions available on the DS21352/DS21552 and DS21354/DS21554 are also available in the MCM packaged version however in order to minimize package size, some signals have been deleted. These differences are detailed in table 1 in the data sheet.

This data sheet describes the electrical connections and the mechanical dimensions only. Please see the DS21352/DS21552 and DS21354/DS21554 data sheets for full details on all of the features and the operating characteristics of the device.