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Features
- 30 ns Instruction Cycle Time (33 MIPS) from 16.67 MHz Crystal at 5.0 V
- 50 ns Instruction Cycle Time (20 MIPS) from 10 MHz Crystal at 3.3 V
- ADSP-2100 Family Code & Function Compatible with New Instruction Set Enhancements for Bit Manipulation Instructions, Multiplication Instructions, Biased Rounding, and Global Interrupt Masking
- Bus Grant Hang Logic
- 2K Words of On-Chip Program Memory RAM
- 2K Words of On-Chip Data Memory RAM
- 8K Words of On-Chip Program Memory ROM (ADSP-2172)
- 8- or 16-Bit Parallel Host Interface Port
- 300 mW Typical Power Dissipation at 5.0 V at 30 ns
- 70 mW Typical Power Dissipation at 3.3 V at 50 ns
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The ADSP-2171, ADSP-2172, and ADSP-2173 are single-chip microcomputers optimized for digital signal processing (DSP) and other high-speed numeric processing applications. The ADSP-2171 and ADSP-2172 are designed for 5.0 V applications. The ADSP-2173 is designed for 3.3 V applications. The ADSP-2172 also has 8K words (24-bit) of program ROM.
The ADSP-217x combines the ADSP-2100 base architecture (three computational units, data address generators, and a program sequencer) with two serial ports, a host interface port, a programmable timer, extensive interrupt capabilities, and on-chip program and data memory.
The ADSP-2171, ADSP-2172, and ADSP-2173 are single-chip microcomputers optimized for digital signal processing (DSP) and other high-speed numeric processing applications. The ADSP-2171 and ADSP-2172 are designed for 5.0 V applications. The ADSP-2173 is designed for 3.3 V applications. The ADSP-2172 also has 8K words (24-bit) of program ROM.
The ADSP-217x combines the ADSP-2100 base architecture (three computational units, data address generators, and a program sequencer) with two serial ports, a host interface port, a programmable timer, extensive interrupt capabilities, and on-chip program and data memory.
In addition, the ADSP-217x supports new instructions, which include bit manipulations-bit set, bit clear, bit toggle, bit test- new ALU constants, new multiplication instruction (x squared), biased rounding, and global interrupt masking, for increased flexibility. The ADSP-217x also has a Bus Grant Hang Logic (BGH) feature.
The ADSP-217x provides 2K words (24-bit) of program RAM and 2K words (16-bit) of data memory. The ADSP-2172 provides an additional 8K words (24-bit) of program ROM. Power-down circuitry is also provided to meet the low power needs of battery operated portable equipment. The ADSP-217x is available in 128-pin TQFP and 128-pin PQFP packages.
Fabricated in a high-speed, double metal, low power, CMOS process, the ADSP-217X operates with a 30 ns instruction cycle time. Every instruction can execute in a single processor cycle.
The ADSP-217x's flexible architecture and comprehensive instruction set allow the processor to perform multiple operations in parallel. In one processor cycle the ADSP-217x can:
- generate the next program address
- fetch the next instruction
- perform one or two data moves
- update one or two data address pointers
- perform a computational operation
This takes place while the processor continues to:
- receive and transmit data through the two serial ports
- receive and/or transmit data through the host interface port
- decrement timer
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ADSP-2171
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Documentation
Application Note 10
AN-344: Digital FIR Filters without Tears
AN-334: Digital Signal Processing Techniques
EE-90: Using the 21xx C-FFT Library
EE-33: Programming The ADSP-21xx Timer In C
AN-227: Digital Control System Design with the ADSP-2100 Family
AN-524: ADV601/ADV611 Bin Width Calculation in ADSP-21xx DSP
EE-36: ADSP-21xx Interface to the IOM-2 bus
EE-19: Boot Paging II: Maximizing Boot-Memory Efficiency on the ADSP-21xx family DSP's (excluding the ADSP-218x)
EE-48: Converting Legacy 21xx Systems To A 218x System Design
AN-227: Digital Control System Design with the ADSP-2100 Family
Processor Manual 1
Obsolete Data Sheet 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| ADSP-2171BSZ-133 |
128-Lead LQFP (14mm x 20mm)
|
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- ADSP-2171BSZ-133
- Pin/Package Drawing
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128-Lead LQFP (14mm x 20mm)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
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Ultra Librarian
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SamacSys
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Part Models
Product Lifecycle
PCN
Jun 18, 2010
- 07_0093
Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts
ADSP-2171BSZ-133
Obsolete
Aug 19, 2009
- 07_0024
Package Material Changes for SOT23, MiniSO, MQFP, PDIP, PLCC, SOIC (narrow and wide body), SSOP, TSSOP and TSSOP exposed pad
ADSP-2171BSZ-133
Obsolete
Jan 5, 2009
- 07_0077
Certification of STATSChipPAC Shanghai, China and AMKOR Philippines as additional sources for Assembly & Test of QFP Packages
Feb 7, 2013
- 13_0003
Obsolescence of the ADSP-2111BG-80 and ADSP-2171BSZ-133
ADSP-2171BSZ-133
Obsolete
Filter by Model
Part Models
Product Lifecycle
PCN
Jun 18, 2010
- 07_0093
Conversion to Laser Mark for all ADSPXXXX, ADSSTXXXX, and PC Audio Codecs Ink on Plastic Encapsulated Parts
Aug 19, 2009
- 07_0024
Package Material Changes for SOT23, MiniSO, MQFP, PDIP, PLCC, SOIC (narrow and wide body), SSOP, TSSOP and TSSOP exposed pad
ADSP-2171BSZ-133
Obsolete
Jan 5, 2009
- 07_0077
Certification of STATSChipPAC Shanghai, China and AMKOR Philippines as additional sources for Assembly & Test of QFP Packages
Feb 7, 2013
- 13_0003
Obsolescence of the ADSP-2111BG-80 and ADSP-2171BSZ-133
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