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  5. ADSP-21573

Data Sheet Rev. B
IBIS Models
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Overview

Features and Benefits

  • Dual-enhanced SHARC+ high performance floating-point cores
    • Up to 500 MHz per SHARC+ core
    • Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache)
    • 32-bit, 40-bit, and 64-bit floating-point support
    • 32-bit fixed point
    • Byte, short word, word, long word addressed
  • Powerful DMA system
  • On-chip memory protection
  • Integrated safety features
  • 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant
  • Low system power across automotive temperature range
  • Memory
    • Large on-chip L2 SRAM with ECC protection, up to 1 MB
    • One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devices
  • Additional Features
    • Security and Protection
      • Cryptographic hardware accelerators
      • Fast secure boot with IP protection
      • Support for arm® TrustZone
    • Accelerators
      • FIR, IIR offload engines
    • Qualified for automotive applications

Product Details

The ADSP-SC57x/ADSP-2157x processors are members of the SHARC® family of products. The ADSP-SC57x processor is based on the SHARC+® dual-core and the arm® Cortex®-A5 core. The ADSP-SC57x/ADSP-2157x SHARC processors are members of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.

By integrating a set of industry leading system peripherals and memory, the arm® Cortex-A5 and SHARC processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.

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Markets and Technologies

ADSP-SC57x and ADSP-2157x Series: Summary and Comparison

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Product Lifecycle icon-recommended Production

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

Evaluation Kits (2)

Documentation & Resources

  • View All (15)
  • Data Sheets (1)
  • Application Notes (6)
  • Processor Manuals (2)
  • Integrated Circuit Anomalies (1)
  • Informational (1)
  • Customer Case Studies (1)
  • Press Releases (1)
  • Technical Articles (1)
  • Webcasts (1)
    • Document Type
    Application Notes

    Software & Systems Requirements

    Software Development Tools

    CrossCore® Embedded Studio

    CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.

    SigmaStudio®+

    System level solution for Automotive Audio, Connectivity and Algorithm/IP applications

    SigmaStudio®

    Graphical development tool for programming, development, and tuning software for ADI DSP audio processors and A2B® transceivers.

    Tools & Simulations

    BSDL Model Files

    IBIS Models

    Design Resources

    ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.

    Part Number Material Declaration Reliability Data Pin/Package Drawing CAD Symbols, Footprints & 3D Models
    ADSP-21573BBCZ-4 Material Declaration Reliability Data 400-Ball CSPBGA (17mm x 17mm x 1.5mm)
    ADSP-21573BBCZ-5 Material Declaration Reliability Data 400-Ball CSPBGA (17mm x 17mm x 1.5mm)
    ADSP-21573CBCZ-4 Material Declaration Reliability Data 400-Ball CSPBGA (17mm x 17mm x 1.5mm)
    ADSP-21573CBCZ-5 Material Declaration Reliability Data 400-Ball CSPBGA (17mm x 17mm x 1.5mm)
    ADSP-21573KBCZ-4 Material Declaration Reliability Data 400-Ball CSPBGA (17mm x 17mm x 1.5mm)
    ADSP-21573KBCZ-5 Material Declaration Reliability Data 400-Ball CSPBGA (17mm x 17mm x 1.5mm)
    Wafer Fabrication Data

    PCN-PDN Information

    Select a model from the dropdown below to subscribe to PCN/PDN notifications and view past notifications as well.

    Select Model for PCN Information
    • ADSP-21573BBCZ-4 Production
    • ADSP-21573BBCZ-5 Production
    • ADSP-21573CBCZ-4 Production
    • ADSP-21573CBCZ-5 Production
    • ADSP-21573KBCZ-4 Production
    • ADSP-21573KBCZ-5 Production

    Support & Discussions

    ADSP-21573 Discussions

    Having a word adressable data buffer in PM memory via "seg_pmda_nw" produces linker error
    ADSP-21573 SPI slave/master boot, PC00 / nSPI2_RDY
    A second stage boot error occurred while using the adi_rom_Boot API
    All ADSP-21573 Discussions
    ADSP-21573 Contact ADI Technical Support »
    ADSP-21573 Ask your question »
    ADSP-21573 Contact ADI Technical Support » ADSP-21573 Ask your question »

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