ADSP-21065L
LAST TIME BUYLow-Cost SHARC, 66 MHz, 198 MFLOPS, 3.3v, Floating Point
Part Details
- 198 MFLOPS (32-bit floating-point)
- 16K 32-bit Dual-ported on-chip memory (544 KBits configurable)
- 64M x 32-bit word external address space
- Glueless SDRAM interface
- I2S mode supports up to 8 channels
- 2 serial transmit/receive ports support 32-channel TDM
- Two timers with event capture and PWM options
- 12 programmable I/O pins
- 10 DMA channels
- Glueless multiprocessing with 2 ADSP-21065Ls
- Download ADSP-21065L-EP data sheet (pdf)
- Extended temperature range –55°C to +110°C
- Controlled manufacturing baseline
- One package assembly/test site
- One wafer fabrication site
- Enhanced product change notification
- Qualification data available upon request
- V62/13601 DSCC Drawing Number
The ADSP-21065L is a general purpose, programmable 32-bit DSP that allows users to program with equal efficiency in both fixed-point or floating-point arithmetic. This programming flexibility combined with the high performance core and integrated peripherals make the ADSP-21065L an outstanding price/performance value for a broad base of consumer, communications, automotive, industrial and computer applications.
The ADSP-21065L is code compatible with ADI's SHARC DSP family and as such customers have immediate access to software and hardware development tools from ADI and SHARC third parties.
Software Resources
Software & Tools Anomaly 1
Evaluation Software 0
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Tools & Simulations
BSDL Model File 2
Designing with BGA
Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages
Open ToolIBIS Model 1
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