ADSP-2104

Obsolete

ADSP-2104

16-bit, 20 MIPS, 5v, 2 serial ports

Obsolete

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Features

20 MIPS, 50 ns Maximum Instruction Rate
Separate On-Chip Buses for Program and Data Memory
Program Memory Stores Both Instructions and Data (Three-Bus Performance)
Dual Data Address Generators with Modulo and Bit-Reverse Addressing
Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop Setup
Automatic Booting of On-Chip Program Memory from Byte-Wide External Memory (e.g., EPROM )

Double-Buffered Serial Ports with Companding Hardware, Automatic Data Buffering, and Multichannel Operation
Three Edge- or Level-Sensitive Interrupts
Low Power IDLE Instruction
PLCC Package

Additional Details

The ADSP-2104 and ADSP-2109 processors are single-chip microcomputers optimized for digital signal processing (DSP) and other high speed numeric processing applications. The ADSP-2104/ADSP-2109 processors are built upon a common core. Each processor combines the core DSP architecture- computation units, data address generators, and program sequencer- with differentiating features such as on-chip program and data memory RAM (ADSP-2109 contains 4K words of program ROM), a programmable timer, and two serial ports.

Fabricated in a high speed, submicron, double-layer metal CMOS process, the ADSP-2104/ADSP-2109 operates at 20 MIPS with a 50 ns instruction cycle time. The ADSP-2104L and ADSP-2109L are 3.3 volt versions which operate at 13.824 MIPS with a 72.3 ns instruction cycle time. Every instruction can execute in a single cycle. Fabrication in CMOS results in low power dissipation.

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Documentation

Technical Documents 14

ADSP-2104/ADSP-2104L: Low Cost DSP Microcomputers Data Sheet (Rev.0) 02/07/2008

AN-344: Digital FIR Filters without Tears 03/08/2008

AN-334: Digital Signal Processing Techniques 03/08/2008

EE-90: Using the 21xx C-FFT Library 09/10/2002

EE-33: Programming The ADSP-21xx Timer In C 09/09/2002

EE-33 Software Code

AN-227: Digital Control System Design with the ADSP-2100 Family 01/01/2000

AN-524: ADV601/ADV611 Bin Width Calculation in ADSP-21xx DSP 12/27/2002

EE-36: ADSP-21xx Interface to the IOM-2 bus 09/09/2002

EE-19: Boot Paging II: Maximizing Boot-Memory Efficiency on the ADSP-21xx family DSP's (excluding the ADSP-218x) 09/09/2002

EE-48: Converting Legacy 21xx Systems To A 218x System Design 09/09/2002

AN-227: Digital Control System Design with the ADSP-2100 Family 04/04/2008

AN-348: Avoiding Passive-Component Pitfalls 02/14/2015

Using the ADSP-2100 Family Volume 2 (Rev.1.0) 03/08/2008

VisualDSP++ 3.5 C/C++ Compiler and Library Manual for ADSP-219x Processors (Rev.4.1) 09/07/2006

Design Resources 1

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.