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- 25 MIPS, 40 ns Maximum Instruction Rate
- Separate On-Chip Buses for Program and Data Memory
- Program Memory Stores Both Instructions and Data (Three-Bus Performance)
- Dual Data Address Generators with Modulo and Bit-Reverse Addressing
- Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop Setup
- Automatic Booting of On-Chip Program Memory from Byte-Wide External Memory (e.g., EPROM )
- Double-Buffered Serial Ports with Companding Hardware, Automatic Data Buffering, and Multichannel Operation
- ADSP-2111 Host Interface Port Provides Easy Interface to 68000, 80C51, ADSP-21xx, etc.
- Automatic Booting of ADSP-2111 Program Memory Through Host Interface Port
- Three Edge- or Level-Sensitive Interrupts
The ADSP-2100 Family processors are single-chip microcomputers optimized for digital signal processing (DSP) and other high speed numeric processing applications. The ADSP-21xx processors are all built upon a common core. Each processor combines the core DSP architecture-computation units, data address generators, and program sequencer-with differentiating features such as on-chip program and data memory RAM, a programmable timer, one or two serial ports, and, on the ADSP-2111, a host interface port.
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ADSP-2103
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