New Content (1)
Features and Benefits
- 3.75 kV rms LVDS isolators
- Complies with TIA/EIA-644-A LVDS signal levels
- Dual-channel configuration (ADN4620: 2 + 0, ADN4621: 1 + 1)
- Any data rate up to 2.5 Gbps switching with low jitter
- 5 Gbps total bandwidth across two channels
- 2.15 ns typical propagation delay
- Typical jitter: 0.82 ps rms random, 40 ps total peak-to-peak
- Lower power 1.8 V supplies with 3.3 V supplies for I/O
- ±7 kV IEC 61000-4-2 ESD protection across isolation barrier
- High common-mode transient immunity: 70 kV/μs typical
- Safety and regulatory approvals (20-lead SSOP package)
- UL (pending): 3750 V rms for 1 minute per UL 1577
- CSA Component Acceptance Notice 5A (pending)
- VDE certificate of conformity, reinforced insulation (pending)
- DIN V VDE V 0884-11 (VDE V 0884-11):2017-01
- VIORM = 1500 VPEAK (maximum working insulation voltage)
- Enable or disable refresh (low speed output correctness check)
- Operating temperature range: −40°C to +125°C
- Compact SSOP package with 5.3 mm creepage
The ADN4620/ADN4621 are dual-channel, signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler® technology, enhanced for high speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high speed signals, such as current mode logic (CML).
The ADN4620/ADN4621 include a refresh mechanism to monitor the input and output states and ensure that they remain the same in the absence of data transitions (for example, at power-on). For lower power consumption and high speed operation with low jitter, the isolator circuits rely on 1.8 V supplies, while 3.3 V supplies are used for LVDS receivers to support the full common-mode range with an input voltage range (input common mode plus differential input voltage) of 0 V to 2.4 V per Table 2 in the data sheet.
The devices are fully specified over a wide industrial temperature range and are available in a compact SSOP package with 5.3 mm creepage (for reinforced insulation at ac mains voltages).
- Analog front-end isolation
- Data plane isolation
- Isolated high speed clock and data links
- Multigigabit serialization/deserialization (SERDES)
- PCB-to-PCB optical replacement (for example, short reach fiber)
Protected by U.S. Patents 7,075,329; 9,941,565; and 10,205,442. Other patents are pending.
Markets and Technologies
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The EVAL-ADN4620EBZ and EVAL-ADN4621EBZ allow quick and easy evaluation of the ADN4620/ADN4621 low voltage differential signaling (LVDS) isolators without the need for external components. The ADN4620/ADN4621 employ the Analog Devices, Inc., iCoupler® technology to combine a 2-channel isolator with LVDS receivers and drivers into a single, 20-lead SSOP package. The ADN4620/ADN4621 are capable of running at data rates of up to 2.5 Gbps with low jitter.
The EVAL-ADN4620EBZ/EVAL-ADN4621EBZ have separate ground and power planes for each side of the isolator, with individual 1.8 V power supplies required on each side of the ADN4620/ADN4621. This separation enables the evaluation of the ADN4620/ADN4621 with galvanic isolation between both sides of the devices. An additional power supply providing 3.3 V is required on Side 1 (and also Side 2 for the ADN4621).
For full details on the ADN4620/ADN4621, see the ADN4620/ADN4621 data sheet, which must be consulted in conjunction with the user guide when using the EVAL-ADN4620EBZ or EVALADN4621EBZ.
Features & Benefits
- Isolated ground planes (logic side and bus side)
- High speed layout supports 2.5 Gigabit operation and precision jitter measurements (<1 ps rms for random jitter)
- Convenient connections through SMA terminals
- 1.8 V power on Side 1 (VDD1) and Side 2 (VDD2)
- 3.3 V power for LVDS receivers on Side 1 (VIO1) and Side 2 (VIO2, used with ADN4621 only)
- Ground on Side 1 (GND1) and ground on Side 2 (GND2)
- Side 1 LVDS signals: DIN1+, DIN1−, DIN2+ or DOUT2+, DIN2− or DOUT2−
- Side 2 LVDS signals: DOUT1+, DOUT1−, DOUT2+ or DIN2+, DOUT2− or DIN2−
- Jumper-selectable refresh mode
- Termination resistors on all LVDS receivers
Tools & Simulations
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
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