Features and Benefits
- 2 selectable differential inputs
- 4.8 GHz operating frequency
- 75 fs rms broadband random jitter
- On-chip input terminations
- 3.3 V power supply
The ADCLK954 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.
The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is available for biasing ac-coupled inputs.
The ADCLK954 features 12 full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias Vcc to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply.
The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC − 2 V for a total differential output swing of 1.6 V.
The ADCLK954 is available in a 40-lead LFCSP and specified for operation over the standard industrial temperature range of −40°C to +85°C.
- Low jitter clock distribution
- Clock and data signal restoration
- Level translation
- Wireless communications
- Wired communications
- Medical and industrial imaging
- ATE and high performance instrumentation
Markets and Technologies
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (1)
The ADCLK954 is a very high performance clock fanout buffer. The evaluation board is fabricated using a high quality Rogers dielectric material. Transmission line paths are kept as close to 50 Ω as possible.
Documentation & Resources
UG-066: Setting Up the Evaluation Board for the ADCLK95411/16/2009230 kB
MT-008: Converting Oscillator Phase Noise to Time Jitter2/14/2015123 kB
RF, Microwave, and Millimeter Wave Product Selection Guide7/13/20189M
Termination of High-Speed Converter Clock Distribution Devices1/1/2010 Analog Dialogue
Design A Clock-Distribution Strategy With Confidence4/27/2006
Understand the Effects of Clock Jitter and Phase Noise on Sampled Systems12/7/2004
Speedy A/Ds Demand Stable Clocks3/22/2004
Tools & Simulations
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
|Part Number||Material Declaration||Reliability Data||Pin/Package Drawing||CAD Symbols, Footprints & 3D Models|
|ADCLK954BCPZ||Material Declaration||Reliability Data||40-Lead LFCSP (6mm x 6mm w/ EP)|
|ADCLK954BCPZ-REEL7||Material Declaration||Reliability Data||40-Lead LFCSP (6mm x 6mm w/ EP)|
|Wafer Fabrication Data|
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.