Three ADCs, One DAC, Low Power Codec with Audio DSPs

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Part Details
Part Models 2
1ku List Price Starting From $8.76
  • Programmable FastDSP audio processing engine
    • Up to 768 kHz sample rate
    • Biquad filters, limiters, volume controls, mixing
  • Tensilica HiFi 3z DSP core
    • Quad MAC per cycle: 24 × 24-bit multiplier and 64-bit accumulator
    • Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz
    • 336 kB total memory
    • JTAG debug and trace
  • Low latency, 24-bit ADCs, and DAC
    • 106 dB SNR (signal through ADC with A-weighted filter)
    • 110 dB combined SNR (signal through DAC and headphone with A-weighted filter)
  • Programmable double precision MAC engine for maximum 24- stage equalizer
  • Serial-port sample rates from 8 kHz to 768 kHz
  • 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions)
  • 3 differential or single-ended analog inputs, configurable as microphone or line inputs
  • 8 digital microphone inputs
  • Analog differential audio output, configurable as either line output or headphone driver
  • 2 PDM output channels
  • PLL supporting any input clock rate from 30 kHz to 36 MHz
  • 4 channel asynchronous sample rate converters (ASRCs)
  • 2, 16-channel serial audio ports supporting I2S, left-justified, right-justified, or up to TDM16 (TDM12 in turbo mode)
  • 8 interpolators and 8 decimators with flexible routing
  • Power supplies
    • Analog AVDD at 1.8 V typical
    • Digital I/O IOVDD at 1.1 V to 1.98 V
    • Digital DVDD at 0.85 V to 1.21 V
    • Headphone HPVDD_L at 1.2 V to AVDD
  • Control/communication interfaces
    • I2C, SPI, or UART control ports
    • Main quad SPI (QSPI)
    • UART communication port
  • Self-boot from QSPI flash
  • Flexible GPIO and IRQ
  • AEC-Q100 qualified for automotive applications
  • 64-lead lead frame chip scale package [LFCSP], 9 mm × 9 mm and 0.75 mm package height
Additional Details
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The ADAU1861 is a codec with three inputs and one output that incorporates two digital-signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency.


  • Automotive audio systems
  • Digital audio effects processors
Part Models 2
1ku List Price Starting From $8.76

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Software & Part Ecosystem

Software & Part Ecosystem

Evaluation Kit

Evaluation Kits 1

reference details image


Evaluating the ADAU1861 Three ADCs, One DAC, Low Power Codec with Audio DSPs



Evaluating the ADAU1861 Three ADCs, One DAC, Low Power Codec with Audio DSPs

Evaluating the ADAU1861 Three ADCs, One DAC, Low Power Codec with Audio DSPs

Product Detail

The user guide details the design and setup of the EVAL-ADAU1861EBZ evaluation board. The EVAL-ADAU1861EBZ provides all the analog and digital inputs and outputs on the ADAU1861. The ADAU1861 core is controlled by Analog Devices, Inc., Lark Studio graphical user interface (GUI) software, which interfaces with the EVAL-ADAU1861EBZ by a USB connection. The EVAL-ADAU1861EBZ can be powered by the USB bus or by a single 12 V supply. Any of these supplies are regulated to the voltages required on the EVAL-ADAU1861EBZ.

The printed circuit board (PCB) of the EVAL-ADAU1861EBZ is a 4-layer design, with a ground plane and a power plane on the inner layers. The EVAL-ADAU1861EBZ contains connectors for external microphones and speakers. The main clock of ADAU1861 can be provided externally or by the on-board 24.576 MHz oscillator or crystal.

The EVAL-ADAU1861EBZ contains a microphone array, aim for beamforming. A 16-channel, high performance, 192 kHz, 24-bit digital-to-analog converter (DAC) is used as the analog output for audio tuning. For compatibility with 3.3 V inputs and outputs, all digital audio interfaces can be transferred to 3.3 V inputs and outputs from 1.8 V with a level shifter.

For full details on the ADAU1861, see the ADAU1861 data sheet, which must be consulted with the user guide when using the EVAL-ADAU1861EBZ evaluation board.

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