Features and Benefits
- Specified for VDD of 2.7 V to
- Very Low Power:
- 0.9 mW max at 100 kSPS with VDD = 3V
- 3 mW max at 100 kSPS with VDD = 5V
- Pseudo Differential Analog Input
- 70 dB SINAD at 30 kHz Input Frequency
- No Pipeline Delays
- Serial Interface
- Automatic Power-Down Mode
- 8 Pin SOT-23
The AD7457 is a 12-bit, low power, successive-approximation (SAR) analog-to-digital converter that features a pseudo differential analog input. This part operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 100 kSPS.
The part contains a low-noise, wide bandwidth, differential track and hold amplifier (T/H) which can handle input frequencies in excess of 1 MHz. The reference voltage for the AD7457 is applied externally to the VREF pin and can range from 100mV to VDD, depending on what suits the application.
The conversion process and data acquisition are controlled using CS and the serial clock allowing the device to interface with Microprocessors or DSPs.
The AD7457 uses advanced design techniques to achieve very low power dissipation.
- Operation with 2.7 V to 5.25 V power supplies.
- Low power consumption. With a 3 V supply, the AD7457 offers 0.9 mW maximum power consumption for a 100 kSPS throughput rate.
- Pseudo differential analog input.
- Flexible power/serial clock speed management. The conversion rate is determined by the serial clock, allowing the power to be reduced as the conversion time is reduced through the serial clock speed increase. Automatic power-down after conversion allows the average power consumption to be reduced.
- Variable voltage reference input.
- No pipeline delays.
- Accurate control of the sampling instant via the CS input and once-off conversion control.
- ENOB > 10 bits typically with 500 mV reference.
Markets and Technologies
Product Lifecycle Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
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