AD676
LAST TIME BUY16-Bit Parallel 100 kSPS Sampling ADC
Overview
- Auto-calibrating
- On-Chip Sample-Hold Function
- Parallel Output Format
- 16 Bits No Missing Codes
- ±1 LSB INL
- –97 dB THD
- 90 dB S/(N+D)
- 1 MHz Full Power Bandwidth
The AD676 is a multipurpose 16-bit parallel output analog-to-digital converter which utilizes a switched-capacitor/charge redistribution architecture to achieve a 100 kSPS conversion rate (10 µs total conversion time). Overall performance is optimized by digitally correcting internal nonlinearities through on-chip autocalibration.
The AD676 circuitry is segmented onto two monolithic chips- a digital control chip fabricated on Analog Devices DSP CMOS process and an analog ADC chip fabricated on our BiMOS II process. Both chips are contained in a single package.
The AD676 is specified for ac (or "dynamic") parameters such as S/(N+D) Ratio, THD and IMD which are important in signal processing applications. In addition, dc parameters are specified which are important in measurement applications.
The AD676 operates from +5 V and ±12 V supplies and typically consumes 360 mW during conversion. The digital supply (VDD ) is separated from the analog supplies (VCC , VEE ) for reduced digital crosstalk. An analog ground sense is provided for the analog input. Separate analog and digital grounds are also provided.
The AD676 is available in a 28-pin plastic DIP or 28-pin side-brazed ceramic package. A serial-output version, the AD677, is available in a 16-pin 300 mil wide ceramic or plastic package.
Documentation
Data Sheet 2
Technical Articles 1
Evaluation Design File 1
This is the most up-to-date revision of the Data Sheet.