AD6634

NOT RECOMMENDED FOR NEW DESIGNS

80 MSPS, Dual-Channel, WCDMA Receive Signal Processor (RSP)

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Overview

  • 80 MSPS Wide Band Inputs (14 Linear Bit Plus 3 RSSI)
  • Two WCDMA-Digital Receivers In Single Package
  • 16-Bit Parallel Outputs
  • Digital AGC Output Bits for RAKE Receiver
  • Digital Re-Sampling For Non-Integer Decimation Rates
  • Programmable Decimating FIR Filters
  • 3.3 Volt I/O, 2.5 Volt CMOS Core
  • Flexible Control For Multi-Carrier And Phased Array
  • Programmable Attenuator Control for Clip Prevention And External Gain Ranging Via Level Indicator
  • User Configurable Built In Self Test (BIST) Capability
  • JTAG Boundary Scan
  • 156 pin BGA Package

The AD6634 is a two channel (dual) digital Receive Signal Processor (RSP) with four cascaded signal-processing elements: a frequency translator, two fixed-coefficient decimating filters, and a programmable coefficient-decimating filter. A 16-bit parallel output port provides a means of accommodating high data rate outputs such as in WBCDMA applications.

The AD6634 is part of Analog Devices' SoftCellTM Multi-carrier transceiver chipset designed for compatibility with Analog Devices' family of high sample rate IF sampling ADCs (AD6640 / AD6644 12 & 14 bit). The SoftCellTM receiver comprises a digital receiver capable of digitizing an entire spectrum of carriers and digitally selecting the carrier of interest for tuning and channel selection. This architecture eliminates redundant radios in wireless base station applications.

High dynamic range decimation filters offer a wide range of decimation rates. The RAM-based architecture allows easy reconfiguration for multi-mode applications.

AD6634
80 MSPS, Dual-Channel, WCDMA Receive Signal Processor (RSP)
AD6634 Functional Block Diagram
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Tools & Simulations

BSDL Model File 1

AD6634 IBIS Models 1

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