Data Sheet Rev. B
IBIS Models
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Overview

Features and Benefits

  • Dual-enhanced SHARC+ high performance floating-point cores
    • Up to 500 MHz per SHARC+ core
    • Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache)
    • 32-bit, 40-bit, and 64-bit floating-point support
    • 32-bit fixed point
    • Byte, short word, word, long word addressed
  • arm® Cortex-A5 core
    • 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle
    • 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity
    • 256 kB L2 cache with parity
  • Powerful DMA system
  • On-chip memory protection
  • Integrated safety features
  • 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant
  • Low system power across automotive temperature range

Memory

  • Large on-chip L2 SRAM with ECC protection, up to 1 MB
  • One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devices

Additional Features

  • Security and Protection
    • Cryptographic hardware accelerators
    • Fast secure boot with IP protection
    • Support for arm® TrustZone
  • Accelerators
    • FIR, IIR offload engines
  • Qualified for automotive applications

Product Details

The ADSP-SC57x/ADSP-2157x processors are members of the SHARC® family of products. The ADSP-SC57x processor is based on the SHARC+® dual-core and the arm® Cortex®-A5 core. The ADSP-SC57x/ADSP-2157x SHARC processors are members of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.

By integrating a set of industry leading system peripherals and memory, the arm® Cortex-A5 and SHARC processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.

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ADSP-SC57x and ADSP-2157x Series: Summary and Comparison

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Evaluation Kits (2)

Documentation & Resources

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  • Data Sheets (1)
  • Application Notes (8)
  • Processor Manuals (2)
  • Integrated Circuit Anomalies (1)
  • Customer Case Studies (1)
  • Press Releases (1)
    • Document Type
    Application Notes

    Software & Systems Requirements

    Middleware

    Operating Systems and Middleware
    Analog Devices, in collaboration with several Alliance partners, provides the following operating system and middleware offerings to enable a user-friendly programming environment for applications developed using the Blackfin® and SHARC® processor families. These real-time kernels and services software seamlessly integrate with CrossCore® Embedded Studio.

    Middleware

    Lightweight TCP/IP (lwIP) Stack

    OBSOLETE: The Lightweight TCP/IP (lwIP) Stack for CrossCore Embedded Studio is an implementation of this widely accepted TCP/IP stack for embedded platforms supporting most of the networking protocols in the TCP/IP suite.

    Software Development Tools

    CrossCore® Embedded Studio

    CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.

    SigmaStudio®

    Graphical development tool for programming, development, and tuning software for ADI DSP audio processors and A2B® transceivers.

    CrossCore® Utilities

    CrossCore Utilities provides several utilities for use with Cortex-M processors. These utilities have previously been distributed within various Board Support Packages for the IAR and Keil toolchains, and are collected together in this product for convenient maintenance.

    Tools & Simulations

    IBIS Models

    Design Resources

    ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

    ADSP-SC570 Material Declaration
    Quality And Reliability
    Symbols and Footprints

    PCN-PDN Information

    Select Model
    • ADSP-SC570BSWZ-4 Production
    • ADSP-SC570BSWZ-42 Production
    • ADSP-SC570CSWZ-4 Production
    • ADSP-SC570CSWZ-42 Production
    • ADSP-SC570KSWZ-4 Production
    • ADSP-SC570KSWZ-42 Production

    Support & Discussions

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