ADSP-21591
Obsolete800 MHz Dual-SHARC+® DSP with 2x 640KB L1, 1024KB Shared L2 SRAM, 400-Ball FCBGA
Part Details
- 800 MHz (max) Core clock frequency
- 2x 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance
- 32-bit, 40-bit & 64-bit floating point support
- 32-bit fixed point
- Byte, short-word, word, long-word addressed
- 1024 KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases
- Level 3 (L3) interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.35 V capable DDR3L devices)
- 1.35V support for DDR3L
- Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power
- Security Crypto Engines with OTP
Innovative Digital Audio Interface (DAI) includes:
- 8x Full SPORT interfaces w/TDM & I2S modes
- 2x S/PDIF Rx/Tx, 8 ASRC pairs
- 8x Precision Clock Generators
- 2x 4-channel PDM Mic Inputs
- 28 Buffers
- 2x Quad SPI, 1x Octal SPI
- MLB 3-pin
- 6x I2C,3x UARTs
- 2x Link Ports
- 16x General Purpose Timer, 1x General Purpose Counter
- 3x Watchdog Timers
- 4-ch 12bit Housekeeping ADC
- 40 GPIO pins, 28 DAI pins
- Thermal Sensor
- 17mm x 17mm (0.8mm pitch) 400-ball FCBGA
- Fully pin-compatible with ADSP-21569, ADSP-21567, and ADSP-21566 processors
- Security and Protection
- Crypto hardware accelerators
- Fast secure boot with IP protection
- Enhanced FIR and IIR accelerators running up to 1 GHz
- AEC-Q100 qualified for automotive applications
Reaching speeds of up to 1 GHz, the ADSP-2159x processors are members of the SHARC® family of products. The ADSP-2159x processor is a dual-SHARC+® core DSP that doubles the audio performance of its single-SHARC+ core ADSP-2156x predecessor while maintaining pin-compatibility to it in the BGA package, providing design scalability from 400 MHz (ADSP-21566) to 2 GHz (ADSP-21593).
The ADSP-2159x SHARC processors are members of the SIMD SHARC family of digital signal processors (DSPs) that feature Analog Devices, Inc., Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.
By integrating a rich set of industry-leading system peripherals and memory (see Table 1 in the data sheet), the SHARC+ processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.
APPLICATIONS
- Automotive:
- audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS
- Consumer & Professional Audio:
- speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones
Documentation
Integrated Circuit Anomaly 1
Software Resources
CrossCore® Utilities
CrossCore Utilities is a collection of utilities for use with Analog Devices processors, in conjunction with CrossCore Embedded Studio, IAR or Keil development tools.
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