ADSP-21571

PRODUCTION

Dual-core SHARC+ DSP (w/768KB L1), 1MB Shared L2, 176-LQFP

Data Sheet (Rev. C) Product Selection Table
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Overview

  • Dual-enhanced SHARC+ high performance floating-point cores
    • Up to 500 MHz per SHARC+ core
    • Up to 3 Mb (384 kB) L1 SRAM memory per core with parity (optional ability to configure as cache)
    • 32-bit, 40-bit, and 64-bit floating-point support
    • 32-bit fixed point
    • Byte, short word, word, long word addressed
  • arm® Cortex-A5 core
    • 500 MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle
    • 32 kB L1 instruction cache with parity/32 kB L1 data cache with parity
    • 256 kB L2 cache with parity
  • Powerful DMA system
  • On-chip memory protection
  • Integrated safety features
  • 17 mm × 17 mm 400-ball CSP_BGA and 176-lead LQFP_EP, RoHS compliant
  • Low system power across automotive temperature range

Memory

  • Large on-chip L2 SRAM with ECC protection, up to 1 MB
  • One L3 interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.5 V capable DDR3L devices), DDR2, or LPDDR1 SDRAM devices

Additional Features

  • Security and Protection
    • Cryptographic hardware accelerators
    • Fast secure boot with IP protection
    • Support for arm® TrustZone
  • Accelerators
    • FIR, IIR offload engines
  • Qualified for automotive applications

The ADSP-SC57x/ADSP-2157x processors are members of the SHARC® family of products. The ADSP-SC57x processor is based on the SHARC+® dual-core and the arm® Cortex®-A5 core. The ADSP-SC57x/ADSP-2157x SHARC processors are members of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.

By integrating a set of industry leading system peripherals and memory, the arm® Cortex-A5 and SHARC processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.
ADSP-21571
Dual-core SHARC+ DSP (w/768KB L1), 1MB Shared L2, 176-LQFP
adsp-21571 Functional Block Diagram
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Documentation

Data Sheet 1

Application Note 7

Processor Manual 2

Integrated Circuit Anomaly 1

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Software Resources

SigmaStudio®+

System level solution for Audio, Connectivity and Algorithm/IP applications

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CrossCore® Embedded Studio

CCES is a world-class integrated development environment (IDE) for the ADI Blackfin®, SHARC® and Arm® processor families.

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SigmaStudio®

Graphical development tool for programming, development, and tuning software for ADI DSP audio processors and A2B® transceivers.

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Tools & Simulations

IBIS Model 1

BSDL Model File 1

Evaluation Kits

eval board
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ADZS-ICE-1500

USB-Based JTAG Emulator for SHARC+ and SHARC-FX Processors

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Features and Benefits

  • JTAG support for multi-core SHARC+ and SHARC-FX with ARM
  • Plug-n-Play, USB 2.0 compliant
  • USB bus-powered device
  • Windows® 10 compatible
  • Multiple processor I/O voltage support: 1.8V and 3.3V
  • Multiprocessor support
  • JTAG clock operation of 5 MHz
  • Multi-colored LED for enhanced status indication
  • Software controlled target reset to support remote debug

Product Details

The Analog Devices ICE-1500 emulator facilitates the creation, test, and debug of advanced applications on Analog Devices Processors and DSPs. Working in tandem with the CrossCore® Embedded Studio development environment, this emulator provides state-of-the-art support for Analog Devices' SHARC processors with optional integrated Arm cores (ADSP-SC5xx/215xx and beyond).

eval board
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ADZS-SC573-EZLITE

ADSP-SC573 Evaluation Hardware for the ADSP-SC57x/ADSP-2157x SHARC Family (400-ball, 17x17mm BGA)

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Features and Benefits

  • ADSP-SC573 400-pin 17x17mm BGA
  • 2Gb DDR3 Memory
  • 128 Mb SPI Flash
  • 2 x Ethernet (1x 10/100, 1x GigE)
  • ADAU1979 quad ADC
  • ADAU1962A 12 channel 24-bit DAC
  • ADAU1977 quad ADC with diagnostics
  • SPDIF in/out, optical & coax
  • UART
  • 2 CAN transceivers + RJ11 connectors
  • USB OTG
  • SD/MMC memory connector
  • HADC
  • EI3 Expansion Interface
  • CrossCore® Embedded Studio EZ-KIT license and ICE-1000 emulator

Product Details

The ADSP-SC573 processor is a member of the SHARC® family of products. The ADSP-SC573 processor is based on the SHARC+ dual-core and the arm® Cortex-A5TM core. The ADSP-SC573 SHARC processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices Super Harvard Architecture. These 32-bit/40- bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with their large onchip SRAM, multiple internal buses to eliminate I/O bottlenecks, and innovative digital audio interfaces (DAI). New enhancements to the SHARC+ core add cache enhancements, branch prediction, and other instruction set improvements—all while maintaining instruction set compatibility to previous SHARC products. The EZ-KIT ships with all of the necessary hardware to get you up and running and start the evaluation immediately
ADZS-ICE-1500
USB-Based JTAG Emulator for SHARC+ and SHARC-FX Processors
ADZS-ICE-1500 Board Photo Angle View ADZS-ICE-1500 Board Photo Top View ADZS-ICE-1500 Board Photo Bottom View
ADZS-SC573-EZLITE
ADSP-SC573 Evaluation Hardware for the ADSP-SC57x/ADSP-2157x SHARC Family (400-ball, 17x17mm BGA)
ADZS-SC573-EZLITE-Angle ADZS-SC573-EZLITE-Top ADZS-SC573-EZLITE-Bottom ADZS-SC573-EZLITE-Kit

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