ADIN2111
Low Complexity, 2-Port Ethernet Switch with Integrated 10BASE-T1L PHYs
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- 10BASE-T1L IEEE Standard 802.3cg-2019 compliant
- Cable reach up to 1700 m
- Integrated switch with SPI
- Supports OPEN Alliance 10BASE-T1x MACPHY SPI
- Frame forwarding rules between ports and host
- 16 MAC address filters
- High and low priority queues with 28 kB buffer
- Cut through or store and forward operation
- IEEE 1588 timestamp support
- Statistic counters
- Low power consumption: 77 mW (dual supply, 1.0 V p-p)
- Supports 1.0 V p-p and 2.4 V p-p transmit levels
- MDI polarity detection and correction
- 2-pin MDI (receive, transmit)
- Internal termination resistors
- Autonegotiation capability
- Diagnostics
- Cable fault detection with TDR
- Link quality indicator with MSE
- Link diagnostics and IEEE test modes
- 25 MHz crystal or external clock input
- Single or dual supply with 1.8 V or 3.3 V operation
- Electromagnetic compatibility (EMC) test standards
- IEC 61000-4-4 electrical fast transient (±4 kV)
- IEC 61000-4-2 ESD (±4 kV contact discharge)
- IEC 61000-4-2 ESD (±8 kV air discharge)
- IEC 61000-4-6 conducted immunity (10 V/m)
- IEC 61000-4-5 surge (±4 kV)
- IEC 61000-4-3 radiated immunity (Class A)
- EN55032 radiated emissions (Class B)
- Small package: 48-lead, 7 mm × 7 mm LFCSP
- Temperature range
- Industrial: −40°C to +85°C
- Extended: −40°C to +105°C
The ADIN2111 is a low power, 2-port 10BASE-T1L transceiver designed for industrial Ethernet applications, and is compliant with the IEEE® 802.3cg-2019™ Ethernet standard for long reach, 10 Mbps single pair Ethernet (SPE). Featuring an integrated media access control (MAC) and a switch, the ADIN2111 enables direct connectivity with a variety of controllers via a serial peripheral interface (SPI). The switch (cut through or store and forward) supports various routing configurations between the two Ethernet ports and the SPI host port providing a flexible solution for line, daisy-chain, or ring network topologies.
The ADIN2111 can be used in unmanaged configurations where the device automatically forwards the traffic between the two Ethernet ports.
The device integrates the switch, two Ethernet physical layer (PHY) cores with a MAC interface and all the associated analog circuitry, and input and output clock buffering. The device also includes internal buffer queues, the SPI and subsystem registers, as well as the control logic to manage the reset and clock control and hardware pin configuration.
The ADIN2111 has an integrated voltage supply monitoring circuit and power-on reset (POR) circuitry to improve system level robustness. The 4-wire SPI for communication with the host can be configured to OPEN Alliance SPI or generic SPI. Both modes support optional data protection or cyclic redundancy check (CRC).
APPLICATIONS
- Building automation and fire safety
- Factory automation
- Condition monitoring and machine connectivity
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ADIN2111
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Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
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ADIN2111BCPZ | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) |
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ADIN2111BCPZ-R7 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) |
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ADIN2111CCPZ | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) |
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ADIN2111CCPZ-R7 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) |
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- ADIN2111BCPZ
- Pin/Package Drawing
- 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP)
- Documentation
- HTML Material Declaration
- HTML Reliablity Data
- CAD Symbols, Footprints, and 3D Models
- Ultra Librarian
- SamacSys
- ADIN2111BCPZ-R7
- Pin/Package Drawing
- 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP)
- Documentation
- HTML Material Declaration
- HTML Reliablity Data
- CAD Symbols, Footprints, and 3D Models
- Ultra Librarian
- SamacSys
- ADIN2111CCPZ
- Pin/Package Drawing
- 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP)
- Documentation
- HTML Material Declaration
- HTML Reliablity Data
- CAD Symbols, Footprints, and 3D Models
- Ultra Librarian
- SamacSys
- ADIN2111CCPZ-R7
- Pin/Package Drawing
- 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP)
- Documentation
- HTML Material Declaration
- HTML Reliablity Data
- CAD Symbols, Footprints, and 3D Models
- Ultra Librarian
- SamacSys
Software & Part Ecosystem
Device Drivers
Looking for Evaluation Software? You can find it here
Parts | Product Life Cycle | Description | ||
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PoE Power Sourcing Equipment (PSE)1 |
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RECOMMENDED FOR NEW DESIGNS |
5-Port SPoE PSE Controller |
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PoE Powered Device (PD)1 |
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RECOMMENDED FOR NEW DESIGNS |
Industrial SPoE PD Controller |
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Request a Driver/SoftwareEvaluation Kits 1
EVAL-ADIN2111
Evaluating the ADIN2111 Low Complexity, 2-Port Ethernet Switch with Integrated 10BASE-T1L PHYs
Product Detail
The EVAL-ADIN2111EBZ is a flexible platform enabling quick evaluation of the ADIN2111, robust, low power 10BASE-T1L 2-Port Ethernet switch. The evaluation board provides 2 10BASE-T1L channels with 10Mbit per second Single Pair Ethernet (SPE) connections reaching up to 1.7km of link distance. The ADIN2111 internal switch can be configured in store and forward mode between the two 10BASE-T1L channels and the SPI host. Cut through mode is also available between Port 1 and Port 2 and can be used without the need of the SPI host (unmanaged configuration).
The evaluation board offers two modes of operation for maximum flexibility: Connected to a PC via USB port, the full set of ADIN2111 register settings and features such as link quality monitoring and diagnostics can be accessed over the USB using the serial command interface implemented in the evaluation firmware.
Alternatively, the board can operate in cut-through mode between Port 1 and Port 2 (unmanaged configuration without firmware) where the EVAL-ADIN2111EBZ acts as a network switch forwarding packets between the 2x 10BASE-T1L ports. The 2x links are configured by setting the ADIN2111 hardware configuration pins jumper and switches. The 2x On-board Activity LEDs provide Link activity status indication for each port.
Custom firmware can also be developed and the ADIN2111 driver support package includes simple project examples to start a custom implementation.
The SPI interface provides access to the management registers required for the switch configuration, the 2 PHYs configuration and data exchange between SPI host and ports.
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