Linear Technology’s next generation LT1167 instrumentation amplifier uses a single resistor to set gains from 1 to 10,000. The single gain-set resistor eliminates expensive resistor arrays and improves VOS and CMRR performance. Careful attention to circuit design and layout, combined with laser trimming, greatly enhances the CMRR, PSRR, gain error and nonlinearity, maximizing application versatility. The CMRR is guaranteed to be greater than 90dB when the LT1167’s gain is set at 1. Total input offset voltage (VOS) is less than 60μV at a gain of 10. For gains in the range of 1 to 100, gain error is less than 0.05%, making the gain-set resistor tolerance the dominant source of gain error. The LT1167’s gain nonlinearity is unsurpassed when compared to other monolithic solutions. It is specified at less than 40ppm when operating at a gain of 1000 while driving a 2kΩ load. The LT1167 is so robust that it can drive 600Ω loads without a significant linearity penalty. These parametric improvements result in an overall gain error that remains unchanged over the entire input common mode range and is not degraded by supply perturbations or varying load conditions. The LT1167 can operate over a wide ±2.3V to ±18V supply voltage range with only 0.9mA supply current. The LT1167 is offered in 8-pin PDIP and SO packages, saving significant board space compared to multi-op amp designs.
As shown in Figure 1, the LT1167’s gain is set by the value of one external resistor. A single 0.1% precision resistor sets the gain from 1 to 10, resulting in better than 0.14% accuracy. At very high gains (≥1000), the error is less than 0.2% when using 0.1% precision resistors.
Low Input Bias Current and Noise Voltage
The LT1167 combines the pA input bias current of FET input amplifiers with the low input noise voltage characteristic of bipolar amplifiers. Using superbeta input transistors, the LT1167’s input bias current is only 350pA maximum at room temperature. The LT1167’s low input bias current, unlike that of JFET input op amps, does not double for every 10°C. The bias current is guaranteed to be less then 800pA at 85°C. The low noise voltage of 7.5nV√Hz at 1kHz is achieved by idling a large portion of the 0.9mA supply current in the input stage.
The inputs of the LT1167 feature low leakage internal protection diodes connected between each input and the supply pins. Their leakage is so low that they do not compromise the low 350pA input bias current. These diodes are rated at 20mA when input voltages exceed the supply rails. Precision and indestructibility are combined when an external 20k resistor is placed in series with each input. There is little offset voltage penalty because the 320pA offset current from the LT1167 multiplied by the 20k input resistors contributes less than 7μV additional offset. With the 20k resistors, the LT1167 can handle both ±400VDC input faults and ESD spikes over 4kV. This passes the IEC 1000-4-2 level 2 specification.
ADC Signal Conditioning
In many industrial systems, differential inputs are used to eliminate ground loops and reject noise on long lines. The LT1167 is shown in Figure 2 changing a differential signal into a single-ended signal. The single-ended signal is then filtered with a passive 1st order RC lowpass filter and applied to the LTC1400 12-bit analog-to-digital converter (ADC). The LT1167’s output stage can easily drive the ADC’s small nominal input capacitance, preserving signal integrity. Figure 3 shows two FFTs of the amplifier/ADC’s output. Figures 3a and3b show the results of operating the LT1167 at unity gain and a gain of ten, respectively. In both cases, the typical SINAD is 70.6dB.
Figure 4 shows a simple, accurate, low power programmable current source. The differential voltage across pins 2 and 3 is mirrored across RG. The voltage across RG is amplified and applied across R1, defining the output current. For example, opening RG and setting R1 equal to 1M sets the output current range from 30pA to 10μA for an input voltage of 0V to 10V. The bottom of the range is limited by circuit noise. The circuit can be operated as a current source or sink by applying a positive or negative differential voltage, respectively. The 50μA bias current flowing from the REF pin (Pin 5) is buffered by the LT1464 JFET operational amplifier, increasing the resolution of the current source to 3pA.