Abstract
The MAX9979 is a fully integrated pin electronics IC, consisting of DCL, PMU, and level settlers. All the blocks of the MAX9979 are enriched with features such as clamps, active load, high range of sourcing and sinking capabilities, data inversion, and differential modes. The MAX9979 parametric measurement unit (PMU) is able to both force and measure current and voltage. Setting the voltage and current clamps ensures the PMU operates in linear region. Understanding the PMU functionality and adjusting clamps according to the application is simplified with this application note.
Introduction
Parametric measurement unit (PMU) block in the MAX9979 is responsible for forcing and measuring current and voltage. A voltage range of -1.5V to 6.5V and full-scale current range of ±2µA to ±50mA can be supported. The voltage and current clamping feature in the MAX9979 makes PMU more versatile towards its performance with some careful considerations.
It is essential to understand the PMU functionality, so this application will first cover the PMU Modes and Range of Operation. Then, the usage of PMU clamps will be covered in detail.
PMU Modes and Range of Operation
The MAX9979 PMU can be configured in six modes of operation as shown in Table 1.
- Force-Voltage/Measure-Voltage (FVMV)
- Force-Voltage/Measure-Current (FVMI)
- Force-Current/Measure-Current (FIMI)
- Force-Current/Measure-Voltage (FIMV)
- Force-Nothing/Measure-Voltage (FNMV)
- Force-Nothing/Measure-Nothing (FNMN)
Digital Input | Serial Interface Bits | PMU Mode | ||
LLEAKP | HIZFORCE | FMODE | MMODE | |
1 | 1 | X | X | FyMy* |
1 | 1 | X | X | FyMy* |
1 | 0 | 0 | X | FVMy* (calibration) |
1 | 0 | 0 | X | FVMy* (calibration) |
1 | 0 | 1 | 0 | FNMN |
1 | 0 | 1 | 1 | FNMV (calibration) |
1 | 0 | 1 | 1 | FNMV (calibration) |
0 | X | X | 0 | FNMN |
0 | X | X | 1 | FNMV (calibration) |
0 | X | X | 1 | FNMV (calibration) |
*y = V or I |
Based on full-scale current range selection, PMU force-current and measure-current can be operated or controlled in different current ranges through three bits of control word (RS2, RS1, and RS0) as captured in Table 2.
Digital Input | Serial Interface Bits | PMU Range (I_{RANGE}, R_{RANGE}) |
|||
LLEAKP | HIZFORCE | RS2 | RS1 | RS0 | |
X | X | 0 | 0 | 0 | E(±2µA, 500kO) |
X | X | 0 | 0 | 1 | D(±20µA, 50kO) |
X | X | 0 | 1 | 0 | C(±200µA, 5kO) |
X | X | 0 | 1 | 1 | B(±2mA, 500O) |
X | 0 | 1 | X | X | B* |
0 | 1 | 1 | X | X | B* |
1 | 1 | 1 | X | X | A(±50mA, 20O) |
* Range A operation is not allowed for PMU high-impedance modes — PMU defaults to range B. |
For more details on PMU operation, refer to PMU MODE OPERATION FOR THE MAX9979 PIN-ELECTRONICS IC.
PMU Voltage/Current Clamps
PMU voltage or current clamps ensure that the DUT_ voltage or current cannot exceed the clamped voltage or current, respectively. PMU voltage clamps are available in FI mode of operation whereas current clamps are available in FV mode. When a PMU voltage/current clamp is active, within its limits, the MV and MI functions are still valid.
Setting CLAMPHI_ and CLAMPLO_ digital-to-analog converters (DAC) sets the high clamp voltage (V_{CLAMPHI}) and low clamp voltage (V_{CLAMPLO}) respectively. In FI mode, the user can set the voltage clamps directly by utilizing CLAMPHI_ and CLAMPLO_ DACs. For current clamps I_{IOS} DAC (V_{IIOS}) needs to be set along with CLAMPHI_ and CLAMPLO_ DACs. Clamp high current (I_{CLAMPHI}) and clamp low current (I_{CLAMPLO}) equations are given below.
I_{CLAMPHI} = (V_{CLAMPHI} - V_{IIOS})/R_{RANGE}
V_{CLAMPHI} = (I_{CLAMPHI} × R_{RANGE}) + V_{IIOS}
Example 1:
Consider PMU in FVMI mode and range B operation.
Considering V_{IIOS} DAC voltage is 2.5V, 1K? is the DUT load. Fix the I_{CLAMPHI} as 2mA and I_{CLAMPLO} as -2mA. Start V_{IN}_ from 2V and gradually decrease. Equations 1 and 2 are utilized for the calculations in Table 3 below.
V_{IN} (V) | V_{IIOS} (V) | I_{CLAMPHI} (mA) | I_{CLAMPLO} (mA) | CLAMPHI DAC Voltage (V) | CLAMPLO DAC Voltage(V) | V_{DUT} (V) | I_{DUT} (mA) | I_{MOS} (uA) |
2 | 2.5 | +2 | -2 | 3.5 | 1.5 | 1.86598 | 1.92857 | 71.43 |
1.5 | 2.5 | +2 | -2 | 3.5 | 1.5 | 1.4969 | 1.5329 | -32.9 |
1 | 2.5 | +2 | -2 | 3.5 | 1.5 | 0.9996 | 1.0299 | -29.9 |
0.5 | 2.5 | +2 | -2 | 3.5 | 1.5 | 0.4992 | 0.5012 | -1.2 |
0 | 2.5 | +2 | -2 | 3.5 | 1.5 | 0.0082 | 0.0085 | -8.5 |
As V_{IN}_ decreases gradually, V_{DUT}_ and I_{DUT} also decrease. The MAX9979 PMU has measure current offset (I_{MOS}) of ±1 % FSR (as mentioned in the EC table of the data sheet). Since PMU is in range B operation (FSR = 4mA) the maximum current offset expected is ±40µA. If the I_{DUT} has offset more than ±40µA then the output is not desirable. In table 3, the teal color readings are desirable, and the orange color readings are not desirable. For the PMU, there are two conditions that need to be met.
To maintain the linearity in FI mode:
(V_{CLAMPLO} + 0.5V) = V_{DUT} = (V_{CLAMPHI} – 0.5V)
To maintain the linearity in FV mode:
(I_{CLAMPLO} + 10% FSR) = I_{DUT} = (I_{CLAMPHI} – 10%FSR)
Example 2:
Consider PMU in FVMI mode and range B operation.
FMODE = 0, MMODE = 0, RRANGE = 500?, FSR = 4mA
Considering V_{IIOS} DAC voltage is 2.5V, 1K? is the DUT_ load. Fix the V_{IN}_ DAC voltage as 1V. Change the clamp current from 2mA to 0mA. Equations 1 and 2 are used for the calculations in Table 4 below.
Expected I_{DUT} = V_{DUT}/R_{LOAD} = 1V/1K? = ±1mA
Note: ±sign indicates that the MAX9979 device can either source or sink the current.
In range B operation: 10% FSR = 10% of 4mA = 0.4mA
From equation 4, assume the following about the device:
I_{DUT} = (I_{CLAMPHI} – 10% FSR)
I_{DUT} + 10% FSR = I_{CLAMPHI}
I_{CLAMPHI} = 1mA + 0.4mA = 1.4mA
Similarly, I_{CLAMPLO} = -1.4mA
V_{IN} (V) | V_{IIOS} (V) | I_{CLAMPHI} (mA) | I_{CLAMPLO} (mA) | CLAMPHI DAC Voltage (V) | CLAMPLO DAC Voltage(V) | V_{DUT} (V) | I_{DUT} (mA) | I_{MOS} (uA) |
1 | 2.5 | 2 | -2 | 3.5 | 1.5 | 0.9996 | 1.0299 | 29.9 |
1 | 2.5 | 1.5 | -2 | 3.25 | 1.5 | 0.9996 | 1.0299 | 29.9 |
1 | 2.5 | 1 | -2 | 3 | 1.5 | 0.8642 | 0.8623 | -137.7 |
1 | 2.5 | 0.5 | -2 | 2.75 | 1.5 | 0.4911 | 0.5018 | -498.2 |
1 | 2.5 | 0 | -2 | 2.5 | 1.5 | 0.1117 | 0.1155 | -884.5 |
V_{IN} is constant at 1V. In FVMI mode, we expect that V_{DUT} = 1V. Therefore I_{DUT} = V_{DUT}/R_{DUT} = 1V/1K? = +1mA. Observe in the orange color rows, that when I_{CLAMPHI} is less than 1.4mA, the V_{DUT} and I_{DUT} readings are not the expected values. In this case, the I_{DUT} offset error is more than ±40uA.
Example 3:
Consider PMU in FVMI mode and range B operation.
FMODE = 0, MMODE = 0, RRANGE = 500?, FSR = 4mA
Considering V_{IIOS} DAC voltage is 2.5V, 1K? is the DUT_ load. Fix the VIN_ DAC voltage as 1.5V and I_{CLAMPHI} as 2mA. Change the I_{CLAMPLO} from -2mA to 1.4mA. Equations 1 and 2 are used for the calculations in Table 5 below.
V_{IN} (V) | V_{IIOS} (V) | I_{CLAMPHI} (mA) | I_{CLAMPLO} (mA) | CLAMPHI DAC Voltage (V) | CLAMPLO DAC Voltage(V) | V_{DUT} (V) | I_{DUT} (mA) | I_{MOS} (uA) |
1.5 | 2.5 | 2 | -2 | 3.5 | 1.5 | 1.4912 | 1.5369 | 36.9 |
1.5 | 2.5 | 2 | -1 | 3.5 | 2 | 1.4912 | 1.5369 | 36.9 |
1.5 | 2.5 | 2 | 0 | 3.5 | 2.5 | 1.4912 | 1.5369 | 36.9 |
1.5 | 2.5 | 2 | 1 | 3.5 | 3 | 1.4912 | 1.5369 | 36.9 |
1.5 | 2.5 | 2 | 1.2 | 3.5 | 3.1 | 1.4912 | 1.5369 | 36.9 |
1.5 | 2.5 | 2 | 1.4 | 3.5 | 3.2 | 1.5174 | 1.5687 | 68.7 |
From equation 4,
(I_{CLAMPLO} + 10% FSR) = I_{DUT} = (I_{CLAMPHI} – 10% FSR)
(I_{CLAMPLO} + 10% FSR) = (I_{CLAMPHI} – 10% FSR)
I_{CLAMPHI} – I_{CLAMPLO} = 20% FSR
V_{CLAMPHI} – V_{CLAMPLO} = (20% FSR) × R_{RANGE}; from equations 1 and 2.
Example 4:
Consider PMU in FIMV mode and range B operation.
FMODE = 1, MMODE = 1, R_{RANGE} = 500?, FSR = 4mA
Considering V_{IIOS} DAC voltage is 2.5V, 1K? is the DUT_ load. Fix the V_{IN} DAC voltage as 5.5V. Change the clamp voltages from ±2.5V to ±1.5V.
When PMU is in FI mode, the voltage clamp comes into the picture. From equation 3,
(V_{CLAMPLO} + 0.5V) = V_{DUT} = (V_{CLAMPHI} – 0.5V).
In FI mode, the current flowing out of DUT is calculated per equation 5 below.
DUT = (V_{IN} – V_{IIOS})/(4 × R_{RANGE})
Where;
I_{DUT} = (5.5 – 2.5)/(4 × 500)
I_{DUT} = 1.5mA
V_{DUT} = I_{DUT} × R_{LOAD} = 1.5mA × 1K? = 1.5V
V_{IN} (V) | V_{IIOS} (V) | V_{CLAMPHI} (V) | V_{CLAMPLO} (V) | V_{DUT} (V) | I_{DUT} (mA) | V_{MOS} (uA) |
5.5 | 2.5 | 2.5 | -2.5 | 1.487 | 1.498 | -13 |
5.5 | 2.5 | 2 | -2 | 1.487 | 1.498 | -13 |
5.5 | 2.5 | 1.5 | -1.5 | 1.393 | 1.441 | -107 |
The expected DUT voltage is 1.5V and the clamp voltage should be 0.5V higher than the expected DUT voltage. When the clamp voltage is the same as the DUT voltage, the DUT voltage starts decreasing (see the orange rows in the chart). The measure of voltage offset (V_{MOS}) increases more than 25mV.
Summary
This application note provides the user with guidelines on operating PMU in linear region. It is quite simple, with the below two equations:
To maintain linearity in FI mode:
(V_{CLAMPLO} + 0.5V) = V_{DUT} = (V_{CLAMPHI} – 0.5V)
To maintain linearity in FV mode:
(I_{CLAMPLO} + 10% FSR) = I_{DUT} = (I_{CLAMPHI} – 10% FSR)
Appendix – Abbreviations:
FI – Force current
FSR – Full-scale reading
FV – Force voltage
I_{CLAMPHI} – High clamp current
I_{CLAMPLO} – Low clamp current
I_{DUT} – DUT output current
I_{RANGE} – Current range
MI – Measure current
MV – Measure voltage
PMU – Parametric measurement unit
V_{CLAMPHI} – High clamp voltage
V_{CLAMPLO} – Low clamp voltage
V_{DUT} – DUT output voltage