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By Rob Reeder, (rob.reeder@analog.com)
However, care should be taken when using center-tapped transformers. If the converter circuit presents large imbalances between the differential analog inputs, a large amount of current could flow through the transformer’s center tap, possibly saturating the core. For example, instability could result if V Although simple in appearance, transformers should not be taken lightly. There is much to know about and learn from them. Let’s look at a simple model of the transformer and see what is “under the hood.” A couple of simple equations relate the currents and voltages occurring at the terminals of an ideal transformer, as shown in Figure 1. When voltage is stepped up by a transformer, its impedance load will be reflected back to the input. The turns ratio,
Figure 1b shows many of the inherent and parasitic departures from the ideal that come into play with a transformer. Each of these has a role in establishing the transformer’s frequency response. They can help or hinder performance, depending on the front-end implementation. Figure 1b provides a good way to model a transformer to get first-order expectations. Some manufacturers provide modeling information, either on their website or through a support group. Anyone planning to do the model analysis using the hardware will need a network analyzer and a handful of samples to make all of the measurements properly. Real transformers have losses and limited bandwidth. As the configuration of parasitics implies, one can think of a transformer as a wideband bandpass filter, which can be defined in terms of its –3-dB points. Most manufacturers will specify transformer frequency response in terms of the 1-, 2-, and 3-dB bandwidth. The amplitude response is accompanied by a phase characteristic. Usually a good transformer will have a 1%-to-2% phase imbalance over its frequency passband. Let us now consider some design examples involving a transformer-coupled front-end for an ADC. Since the transformer is used primarily for isolation and center-tapping, these examples will be simplified for discussion by using a unity turns ratio.
The resistive combination in the transformer secondary is effectively in parallel with the 58-ohm resistor. The choice of terminating resistor depends on the desired input impedance. For simplicity, it will be assumed that a match to a 50-ohm source is required for all of the examples in this section.
This is an easy example because we assume that the input frequency is in baseband or first Nyquist zone. However, the situation is quite different if the front-end design is called on to handle a 100-MHz analog input. What happens in the transformer? With such a high IF frequency applied, any difference in parasitic capacitive coupling (C2–C5 in Figure 1b) unbalances the secondary outputs of the transformer. The resulting asymmetry gives rise to even-order distortions at the converter’s analog input, which leads to 2nd-order harmonic distortions in the digital signal. To illustrate this point, Figure 3 shows the voltages on the secondary when a 2-V p-p sinusoidal input is applied to the primary (100 MHz in Figure 3a and 200 MHz in Figure 3b). The secondary outputs are each expected to produce a 1-V p-p sine wave. But at 100 MHz, their amplitudes deviate by 10.5 mV p-p, with 0.5° phase imbalance. And at 200 MHz, the amplitude difference is 38 mV p-p, or 1.9%.
One way to improve the situation is to apply a second transformer in cascade with the first to provide additional isolation and reduce the unbalanced capacitive feedthrough (Figure 4).
Using this scheme, the differential voltages applied to the converter are less likely to deviate from one another, particularly at high frequencies where this matters most. Figure 5 illustrates this point: the first transformer’s secondary differences in parasitic coupling capacitances, C1 and C2, are reduced. The second transformer in cascade enables a redistribution of the core current lost and provides more equal signals to the primary of the second transformer. The two cascaded transformers in this configuration provide a better balanced solution for high frequencies.
The performance benefit can be seen in Figure 6 from the simulation. In Figure 6a, with an analog input of 100 MHz, the deviation drops to 0.25 mV p-p, or 0.013% phase unbalance. And at 200 MHz (Figure 6b), there is only a 0.88 mV p-p difference between the transformer’s secondary outputs, or 0.044%. This is a big improvement, attained by adding one extra component.
Another way to approach this is to use a two-balun type transformer configuration. A balun (balance-unbalance) acts like a transmission line and usually has greater bandwidth than the standard flux type transformers discussed earlier. They can provide good isolation between the primary and secondary with relatively low loss. However, they require more power to drive because the input impedance is halved from the primary to the secondary. Figure 7a shows a common implementation that is used in order to achieve a wide passband. In Figure 7b, the balun type transformer is precompensated for the imbalance.
Figure 9 shows the circuit of Figure 2 with a series inductor. The value of inductance depends on the desired amount of peaking and bandwidth. However, the designer should note that this peaking could be undesirable where flatness of response and well-behaved phase response are important criteria.
The 200-nH series inductance is meant to cancel out the reactance of the input capacitor that was reflected back from the ADC’s input, making the input look as resistive as possible in order to achieve a good 50-ohm termination in the frequency band of interest. Note that other inductance values might be used to set the bandwidth and gain flatness desired, as seen in Figure 8b. For all the examples discussed here, a 1:1 turns ratio (impedance ratio) was used. So the transformer provides a nominal voltage gain of 0 dB. This is the easiest type of transformer to configure, because the transformer’s parasitics are relatively easy to understand and compensate for. However, some applications may require inherent voltage gain, when the input signals are low. Using a turns ratio of 1:2 or 1:4 (impedance ratio of 4 or 16), the transformer provides respective voltage gains of 6 dB or 12 dB. The benefit here is that, unlike an amplifier, a transformer generates essentially no noise. However, the parasitics in a 1:2 or 1:4 transformer are much more difficult to compensate for, particularly over a wide range of frequencies. With a 1:2 turns ratio, for example, the capacitive terms quadruple while the inductive and resistive terms go down to one-fourth their original value. For a 1:4 turns ratio, the same terms go up or down by a factor of 16. The challenge is even more difficult when interfacing with a switched-capacitor-input ADC, because the capacitive terms are both large and variable with frequency. Considering the difficulties, the best way to undertake a design such as this is to optimize for the center frequency of interest within the given band.
Atmel Corporation, Application Note, “Single-to-Differential Conversion in High-Frequency Applications.” Biernacki, Janusz and Dariusz Czarkowski, “High-Frequency Transformer Modeling,” Breed, Gary A., “Transmission Line Transformer Basics,” Hazen, Mark E., M/A-Com, TP-101 Data Sheet. Mini-Circuits, ADT1-1WT Data Sheet. Pulse Engineering, Inc., CX2039 Data Sheet. Reeder, Rob, A Front End for Wideband A/D Converters, Reeder, Rob, Application Note AN-742: “Frequency Domain Response of Switched-Capacitor ADCs,” Analog Devices, Inc., 2004. Sevick, Jerry, “Design of Broadband Ununs [baluns] with Impedance Ratios Less Than 1:4,”
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