6.5 Gbps Quad Buffer Mux/Demux
The nonblocking switch-core of the AD8158 implements a 2:1 multiplexer and 1:2 demultiplexer per lane and supports independent lane switching through the four select pins, SEL[3:0]. Each port is a four-lane link. Every lane implements an asynchronous path supporting dc to 6.5 Gbps NRZ data, fully independent of other lanes. The AD8158 has low latency and very low lane-to-lane skew.
The main application of the AD8158 is to support redundancy on both the backplane and the line interface sides of a serial link. The demultiplexing path implements unicast and bicast capability, allowing the part to support either 1 + 1 or 1:1 redundancy.
The AD8158 is also suited for testing high speed serial links because of its ability to duplicate incoming data. In a port-monitoring application, the AD8158 can maintain link-connectivity with a pass-through connection from Port C to Port A while sending a duplicate copy of the data to test equipment on Port B.
The rich feature set of the AD8158 can be controlled either through external toggle pins or by setting on-chip control registers through the I2C interface.
- Low cost redundancy switch
- SONET OC48/SDH16 and lower data rates
- XAUI/GbE/FC/Infiniband over backplane
- OIF CEI 6.25 Gbps over backplane
- Serial data-level shift
- 4-/8-/12-lane equalizers or redrivers
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