SHARC, 50 MHz, 150 MFLOPS, 5v, floating point

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Product Details

The ADSP-21061 is a member of the powerful SHARC ® family of floating point processors. The SHARC ® ­Super Harvard Architecture Computer­are signal processing microcomputers that offer new capabilities and levels of integration and performance.

The ADSP-21061 is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061 combines the ADSP-21000 DSP core with a dual-ported on-chip SRAM and an I/O processor with a dedicated I/O bus to form a complete system-in-a-chip.

Fabricated in a high-speed, low-power CMOS process, the ADSP-21061 has a 20 ns instruction cycle time operating at 50 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.

The ADSP-21061 SHARC ® combines a high-performance floating-point DSP core with integrated, on-chip system features, including a 1 Mbit SRAM memory, host processor interface, DMA controller, serial ports and parallel bus connectivity for glueless DSP multiprocessing.

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At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

ADSP-21061 Material Declaration
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