Low Noise, 2:8 Differential, Fanout Buffer

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Product Details

The HMC6832 is an input selectable, 2:8 differential fanout buffer designed for low noise clock distribution. The IN_SEL control pin selects one of the two differential inputs. This input is then buffered to all eight differential outputs. The low jitter outputs of the HMC6832 lead to synchronized low noise switching of downstream circuits, such as mixers, analog-todigital converters (ADCs)/digital-to-analog converters (DACs), or serializer/deserializer (SERDES) devices. The device is capable of low voltage, positive emitter-coupled logic (LVPECL) or low voltage differential signaling (LVDS) configurations by pulling the CONFIG pin low for LVPECL or high or open (internally pulled high) for pseudo LVDS.

Product Highlights

  1. Multiple Output Configurations.
    The CONFIG pin allows the user to select LVPECL or LVDS output termination.
  2. Multiple Supply Voltage Operation.
    The HMC6832 operates at 2.5 V or 3.3 V for LVPECL terminations (2.5 V only for LVDS).
  3. Low Noise.
    The HMC6832 noise is low, typically from −168 dBc/Hz to −162 dBc/Hz up to 3000 MHz.
  4. Low Propagation Delay.
    The HMC6832 displays a low delay, less than 207 ps, typical. Channel skew is also low, ±5 ps, typical.
  5. Low Core Current.
    The HMC6832 has a low core current of 56 mA, typical.


  • SONET, Fibre Channel, GigE clock distribution
  • ADC/DAC clock distribution
  • Low skew and jitter clocks
  • Wireless/wired communications
  • Level translation
  • High performance instrumentation
  • Medical imaging
  • Single-ended to differential conversions

Product Lifecycle

checked Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

Evaluation Kits


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EVAL-HMC6832 Circuit Diagram

Product Details

User guide UG-942 describes the two evaluation boards for evaluating the HMC6832 fully differential output buffer. Both evaluation boards, EV1HMC6832ALP5L and EV2HMC6832ALP5L, allow access to all HMC6832 input/outputs via SMAs.

The EV1HMC6832ALP5L is configured for the LVPECL version of the product whereas the EV2HMC6832ALP5L is configured for LVDS. Each board has an on-board low dropout (LDO) regulator for 2.5 V/3.3 V operation that can be disabled to use an external supply. Each board has matched RF differential traces for testing output to output channel skew.

For full specifications on the HMC6832, see the product data sheet, which should be consulted in conjunction with this user guide when working with the evaluation board. The evaluation board schematics and the HMC6832 data sheet are available on the HMC6832 product page.

Design Resources

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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

HMC6832 Material Declaration
PCN-PDN Information Quality And Reliability Symbols and Footprints



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The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.

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Evaluation Boards Pricing displayed is based on 1-piece.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.