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AD6633:  Multi-channel (Digital) Transmit Signal Processor (TSP) with VersaCREST™ Crest Reduction Engine

Product Details


The AD6633 is a multi-channel, wide-bandwidth (Digital) Transmit Signal Processor (TSP) with VersaCREST™ crest reduction engine. It processes digital baseband input data and generates wideband, real or complex output data. It drives Intermediate Frequency (IF) sampling Digital to Analog Converters (DACs) at sample rates up to 125 Mega Samples Per Second (MSPS). Up to six wideband modulated carriers per package can be achieved from a single output port. Devices may be connected together for additional channels by using multiple packages. Interpolation, anti-imaging filtering, all pass equalization, and NCO tuning functions are combined in a single, cost-effective device which includes the VersaCREST™ crest factor reduction engine.

Each VersaCREST™ wideband channel contains a peak-to-average compensation block that reduces Power Amplifier (PA) requirements. By minimizing infrequent peaks in Code-Division Multiple-Access (CDMA) signals, a PA with one-half to one-quarter the previously necessary power capacity can be used. This is done within standard signal quality requirements, and significantly lowers system cost.

VersaCREST is a trademark of Analog Devices Inc.

FEATURES and BENEFITS

  • 4 or 6 wideband digital upconverter channels
  • VersaCREST™ crest reduction engine reduces demands on external power amplifiers
  • One 20-bit complex input port (I/Q interleaved), shared among 4 or 6 processing channels
  • Two 18-bit output ports for parallel I and Q, or interleaved I and Q on a single port
  • All-pass phase equalizer filters (meets cdma2000 requirements)
  • Programmable RAM coefficient FIR filters (RCF) with resampling
  • FIR interpolating filters and Fifth-order interpolating CIC filter
  • Full complex NCO, 32-bit tuning resolution (fine), worst spur better than - 105 dBc
  • Complex FIR filter for frequency equalization
  • Power monitoring and output Automatic Gain Control
  • 16-bit/8-bit MicroPort or SPI/SPORT compatible serial port
  • 3.3 V I/O and 1.8 V core supplies

Functional Block Diagram for AD6633

Documentation

Title Content Type File Type
AD6633: Multichannel Digital UpConverter with VersaCREST™ Crest Reduction Engine Data Sheet (Rev Sp0, 11/2004) (pdf, 89 kB) Data Sheets PDF
AN-0974: Multicarrier TD-SCMA Feasibility  (pdf, 634 kB) Application Notes PDF
AN-835: Understanding High Speed ADC Testing and Evaluation  (pdf, 985 kB) Application Notes PDF
Design A Clock-Distribution Strategy With Confidence
by Demetrios Efstathiou (Electronic Design, April 27, 2006)
Technical Articles HTML
DUC Eclipses Competitive Offerings
This Digital Upconverter Device Relies On A Unique Patent-Pending Engine Technology To Reduce Power And Costs While Improving Signal-Conditioning Performance. (Wireless Systems Design, March 2004)
Product Reviews HTML
RAQs index Rarely Asked Questions HTML
Glossary of EE Terms Glossary HTML

Design Tools,Models,Drivers & Software

Title Content Type File Type
AD6633 IBIS Model IBIS Models HTML

Evaluation Kits & Symbols & Footprints

Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.

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Price, packaging, availability

AD6633 Model Options
Price Table Help

The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.


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