The AD9863 is a member of the MxFE® family, a group of integrated converters for the communications market. The AD9863 includes dual 12-bit Analog-to-Digital Converters (ADCs) and dual 12-bit Digital to Analog Converters (TxDAC® converters). A -50 speed grade is available. The -50 is optimized for ADC sampling of 50 MSPS and less. The dual TxDAC converters operate at speeds up to 200 MHz and includes a bypassable 2x or 4x interpolation filter. All devices are optimized for low power, small form factor and provide a cost effective solution for the broadband communication market.
The AD9863 utilizes two independent input clocks input for controlling all system clocks. The ADC sampling rate is controlled by the CLKIN1 input. The DAC sampling rate is controlled by the CLKIN2 input and a Phase-Lock-Loop clock multiplier.
A Flexible bi-directional 24-bit I/O bus is used to accommodate a variety of custom digital back ends or open market DSPs. In half duplex systems, the interface supports 24-bit parallel transfers or 12-bit interleaved transfers. In Full duplex systems, the interface supports an interleaved 12-bit ADC bus and an interleaved 12-bit Tx bus. The Flexible I/O bus reduces pin count and therefore required package size.
The AD9863 can use either mode pins or a serial programmable interface (SPI) to configure the interface bus, operate the ADC in a low power mode, configure the TxDAC converter interpolation rate, control the ADC power down and TxDAC converter power down. The SPI allows for more programmable options for both the TxDAC path (for example, coarse and fine gain control, offset control for channel matching) and ADC path (for example, internal duty cycle stabilizer, 2's complement data format).
The AD9863 is packaged in a 64-pin lfCSP package (low profile, fine pitch chip scale package). The 64-pin lfCSP package footprint is only 9 mm by 9 mm and is less than 0.9 mm high fitting into tightly spaced applications such as PCMCIA cards.
|Title||Content Type||File Type|
|AD9863: 12-Bit Mixed-Signal Front-End (MxFE) Baseband Transceiver For Broadband Applications Data Sheet (Rev A, 04/2005) (pdf, 991 kB)||Data Sheets|
|AN-928: Understanding High Speed DAC Testing and Evaluation (pdf, 4445 kB)||Application Notes|
AN-808: Multicarrier CDMA2000 Feasibility
(pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
|AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (pdf, 262 kB)||Application Notes|
EE-236: Real-Time Solutions Using Mixed-Signal Front-End Devices with the Blackfin® Processor
(pdf, 149 kB)
|MS-2210: Designing Power Supplies for High Speed ADC (pdf, 327 kB)||Technical Articles|
|Analog Front End for 3G Femto Base Stations Bring Wireless Connectivity Home||Analog Dialogue||HTML|
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
|Title||Content Type||File Type|
|AD9863 IBIS Models||IBIS Models||HTML|
Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.
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