The AD9059 is a dual 8-bit monolithic analog-to-digital converter optimized for low cost, low power, small size, and ease of use. With a 60 MSPS encode rate capability and full-power analog bandwidth of 120 MHz typical, the component is ideal for applications requiring multiple ADCs with excellent dynamic performance.
To minimize system cost and power dissipation, the AD9059 includes an internal +2.5 V reference and dual track-and-hold circuits. The ADC requires only a +5 V power supply and an encode clock. No external reference or driver components are required for many applications.
The AD9059's single encode input is TTL/CMOS compatible and simultaneously controls both internal ADC channels. The parallel 8-bit digital outputs can be operated from +5 V or +3 V supplies. A power-down function may be exercised to bring total consumption to < 12 mW when ADC data is not required for lengthy periods of time. In power-down mode the digital outputs are driven to a high impedance state.
Fabricated on an advanced BiCMOS process, the AD9059 is available in a space saving 28-lead surface mount plastic package (28 SSOP) and is specified over the industrial (-40°C to +85°C) temperature range.
Customers desiring single channel digitization may consider the AD9057, a single 8-bit, 60 MSPS monolithic based on the AD9059 ADC core. The AD9057 is available in a 20-lead surface mount plastic package (20 SSOP) and is specified over the industrial temperature range.
|Title||Content Type||File Type|
|AD9059: Dual 8-Bit, 60 MSPS A/D Converter Data Sheet (Rev A, 05/2003) (pdf, 226 kB)||Data Sheets|
|AN-737: How ADIsimADC Models an ADC (pdf, 373 kB)||Application Notes|
|AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (pdf, 370 kB)||Application Notes|
|AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (pdf, 291 kB)||Application Notes|
AN-501: Aperture Uncertainty and ADC System Performance
(pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
|AN-302: 02: Exploit Digital Advantages in an SSB Receiver (pdf, 417 kB)||Application Notes|
|MS-2210: Designing Power Supplies for High Speed ADC (pdf, 327 kB)||Technical Articles|
Correlating High-Speed ADC Performance to Multicarrier 3G Requirements
by Brad Brannon (RF Design, 6/1/2003)
DNL and Some of its Effects on Converter Performance
... by Brad Brannon, Analog Devices, Inc. (Wireless Design & Development, June 2001)
Proper Grounding Is Critical For High-Speed Systems
... by Walt Kester and James Bryant, Analog Devices, Inc. (Wireless Systems Design, May 2000)
|RAQs index||Rarely Asked Questions||HTML|
|Glossary of EE Terms||Glossary||HTML|
Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.
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