Single or Dual Supply?
Although it is advantageous to implement op-amp circuits with balanced dual supplies, there are many practical applications where, for energy conservation or other reasons, single-supply operation is necessary or desirable. For example, battery power, in automotive and marine equipment, provides only a single polarity. Even line-powered equipment, such as computers, may have only a single-polarity built-in supply, furnishing +5 V or +12 V dc for the system. In processing analog signals, a common feature of single-supply operation is the need for additional components in each stage for appropriate signal-biasing. If this is not carefully thought through and executed, instability and other problems may be encountered.
Common Problems with Resistor Biasing
Single-supply op-amp applications have inherent problems that are not usually encountered in dual-supply circuits. The fundamental issue is that, if the signal is to swing both positive and negative with respect to "common", this zero-signal reference voltage must be at a fixed level between the supply rails. The principal advantage of dual supplies is that their common connection provides a stable, low-impedance zero-reference. The two supply voltages are usually equal and opposite (and often tracking), but that's not an absolute necessity. With a single supply, such a node must be created artificially, by introducing additional circuitry to provide some form of biasing, to maintain signal common at an appropriate mid-supply voltage.
Since it is usually desirable for large output values to limit symmetrically, the bias is usually established at the midpoint of the rated amplifier output range, or (for convenience) at one-half the supply voltage. The most effective way to achieve this is with a regulator, as in Figure 6; however, a popular method involves tapping the supply voltage with a pair of resistors. Though apparently simple, there are problems with it.
Illustrating the problem, the circuit of Figure 1, which has several design weaknesses, is an ac-coupled non-inverting amplifier. The signal is capacitively coupled in and out. The average level of the ac-coupled input is biased to Vs/2 by the RA-RB divider pair, and the in-band gain is G = 1 + R2/R1. The dc "noise gain" is reduced to unity by capacitively coupling the feedback with a zero established by R1 and C1, so that the dc level of the output is equal to the bias voltage. This avoids distortion due to excessive amplification of the amplifier's input offset voltage. The amplifier's closed-loop gain rolls off from (1+R2/R1) at high frequency to unity at dc, with break frequencies at f=1/[2π R1 C1] and f=1/[2π (R1 + R2) C1], introducing phase shifts that add to those associated with the input- and output coupling circuits.
This simple circuit has additional potentially serious limitations. First, the op-amp's inherent ability to reject supply-voltage variations is to no avail, as any change in supply voltage will directly change the Vs/2 biasing voltage set by the resistor divider. While this does not present a problem at dc, any common-mode noise appearing at the power-supply terminals will be amplified, along with the input signal (except at the lowest frequencies). With a gain of 100, 20 millivolts of 60-Hz ripple and hum will be amplified up to a 1-volt level at the output.
Even worse, instability can occur in circuits where the op-amp must supply large output currents into a load. Unless the power supply is well regulated (and well bypassed), significant signal voltages will appear on the supply line. With the op-amp's non-inverting input referenced directly off the supply line, these signals will be fed directly back into the op-amp, often in a phase relationship that will produce "motor boating" or other forms of oscillation.
While the use of extremely careful layout, multi-capacitor power supply bypassing, star grounds, and a printed circuit board "power plane", all help to reduce noise and maintain circuit stability, it is better to employ circuit design changes that will improve power supply rejection. A few are suggested here.
Decoupling the Biasing Network from the Supply
One step toward a solution is to bypass the bias-voltage divider, and provide a separate input return resistor, modifying the circuit as shown in Figure 2. The tap point on the voltage divider is now bypassed for ac signals by capacitor C2, to restore the ac power-supply rejection. Resistor, Rin, which replaces Ra/2 as the circuit's input impedance for ac signals, also provides a dc return path for the + input.
The values of RA and RB should of course be as low as feasible; the 100-k ohm values chosen here are intended to conserve supply current, as one might wish to do in a battery-powered application. The bypass capacitor value should also be carefully chosen. With a 100k/100k-ohm voltage divider for RA and RB and a 0.1-µF or similar capacitance value for C2, the -3dB bandwidth of this network's impedance, set by the parallel combination of RA, RB and C2, is equal to 1/[2π (RA/2)C2] = 32 Hz. Although this is an improvement on Figure 1, the common-mode rejection drops off below 32 Hz, allowing substantial feedback through the power supply at low signal frequencies. This requires a larger capacitor to avoid "motorboating" and other manifestations of instability.
A practical approach is to increase the value of capacitor C2. so that it is large enough to effectively bypass the voltage divider at all frequencies within the circuit's passband. A good rule of thumb is to set this pole at one-tenth the –3-dB input bandwidth, set by RIN/CIN and R1/C1.
The amplifier's gain at dc is still unity. Even so, the op-amp's input bias currents need to be considered. RIN, in series with the RA/RB voltage divider, adds considerable resistance in series with the op-amp's positive input terminal. Maintaining the op-amp's output close to midsupply, using common voltage-feedback op amps that have symmetrical balanced inputs, can be achieved by balancing this resistance by the choice of R2.
Depending on the supply voltage, typical values that provide a reasonable compromise between increased supply current and increased sensitivity to amplifier bias current, range from 100 k ohms for +15-V or +12-V single supplies, down to 42 k ohms for a 5-V supply and 27 k ohms for 3.3 V.
Amplifiers designed for high-frequency applications (especially current-feedback types) need to use low input and feedback resistances in order to maintain bandwidth in the presence of stray capacitance. An op-amp such as the AD811, which was designed for video speed applications, typically will have optimum performance using a 1 k ohm resistor for R2. Therefore, these types of applications need to use much smaller resistor values in the RA/RB voltage divider (and higher bypass capacitances) to minimize input bias current and avoid low-frequency instability.
Because of their low bias current, the need for balancing input resistors is not as great in applications with modern FET-input op-amps, unless the circuit is required to operate over a very wide temperature range. In that case, balancing the resistance in the op-amp's input terminals is still a wise precaution.
Figure 3 shows how biasing and bypassing might be applied in the case of an inverting amplifier.
The resistor divider biasing technique is low in cost and keeps the op-amp's dc output voltage at VS/2, but the op amp's common mode rejection still depends on the RC time constant formed by RA||RB and capacitor C2. Using a C2 value that provides at least 10 times the RC time constant of the input RC coupling network (R1/C1 and Rin/Cin) will help insure a reasonable common-mode rejection ratio. With 100-k ohm resistors for RA and RB, practical values of C2 can be kept fairly small as long as the circuit bandwidth is not too low.
Zener Diode Biasing
A more-effective way to provide the necessary VS/2 biasing for single supply operation is to use a Zener-diode regulator, such as that shown in Figure 4. Here current is supplied to the Zener diode through resistor R. Capacitor CN helps reduce Zener-generated noise from appearing at the op-amp input.
A Zener should be chosen that has an operating voltage close to VS/2. Resistor RZ needs to be selected to provide a high enough current to operate the Zener at its stable rated voltage and to keep the Zener output noise low. Yet, it is also important to minimize power consumption (and heating) and to avoid damage to the Zener. As the op-amp input draws little current from the reference, it's a good idea to choose a low-power diode. A 250-mW-rated device is best but the more-common 500-mW types are also acceptable. The ideal Zener current varies with each manufacturer, but practical Iz levels between 500 µA (250-mW device) and 5 mA (500-mW device) are usually a good compromise for this application.
Within the operating limits of the Zener, the circuit of Figure 4 basically provides low reference-level impedance, which restores the op-amp's power supply rejection. The benefits are substantial, but there is a price: More power is consumed, and the op amp's dc output is fixed by the Zener voltage, rather than at VS/2. If the power supply voltage drops substantially, asymmetrical clipping can occur on large signals. Also, input bias currents still need to be considered. Resistors RIN and R2 should be close to the same value to prevent input bias currents from creating substantial offset voltage error.
Figure 5 is an inverting amplifier circuit using the same Zener biasing method.
Table 1 shows some common Zener diode types that can be chosen to provide halfway supply bias for various supply voltage levels. For convenience, practical RZ values are provided to furnish 5-mA and 0.5-mA device currents in circuits 4 and 5. For lower circuit noise, the optimum Zener current can be selected by referring to the manufacturer's data sheet.
Table 1. Suggested Zener-diode part numbers (Motorola types) and Rz values for use in Figures 4 and 5.
Op-Amp Biasing Using a Linear Voltage Regulator
For op-amp circuits operating from the +3.3-V standard, a +1.65-V biasing voltage is needed. Zener diodes are commonly available only down to +2.4 V, although the 1.225-volt AD589 and AD1580 bandgap shunt regulators can be used like Zener diodes to provide a fixed—though not centered—voltage at low impedance. The easiest way to provide arbitrary values of biasing voltage at low impedance (for example, VS/2) is to use a linear voltage regulator, such as the ADM663A or ADM666A, as shown in Figure 6. Its output can be adjusted from 1.3 to 16 V, and it will provide low-impedance biasing for single-supply voltages from 2 V to 16.5 V.
DC Coupled Single Supply Circuits
So far, only ac-coupled op-amp circuits have been discussed. Although with the use of suitable large input and output coupling capacitors, an ac-coupled circuit can operate at frequencies well below 1 Hz, some applications require true dc input and output coupling. Circuits that provide constant dc voltage at low impedance, such as the Zener diodes and regulators discussed above, can be used to provide "ground-level" voltages.
Alternatively, the VS/2 biasing resistors of Figures 1 through 3 can be buffered by an op amp to provide a low-impedance "phantom ground" circuit as shown in Figure 7. If a low-voltage battery is the supply source, say +3.3V, the op-amp should be a "rail to rail" device that is able to operate effectively over the full supply-voltage range. The op-amp also needs to be able to supply a positive or negative output current large enough to satisfy the main circuit's load requirements. Capacitor C2 bypasses the voltage divider to attenuate resistor noise. This circuit does not need to provide power supply rejection, because it will always drive the common terminal ("ground") at one-half the supply voltage.
Circuit Turn-On Time Issues
One final issue that needs to be considered is circuit turn-on time. The approximate turn on time will depend on the RC time constant of the lowest-bandwidth filter being used.
The circuits with passive biasing shown here all should require the RA||RB-C2 voltage-divider network to have a 10× longer time constant than that of the input or output circuit. This is to simplify the circuit design (since up to three different RC poles set the input bandwidth). This long time constant also helps keep the biasing network from "turning on" before the op-amp's input and output networks, thus allowing the op-amp's output to gradually climb from zero volts to VS/2 without being driven to the positive supply rail. The required 3-dB corner frequency is 1/10th that of R1C1 and RloadCout. For example: in Figure 2, for a circuit BW of 10 Hz and a gain of 10, a C2 value of 3 µF provides a 3-dB BW of 1 Hz.
With RA||RB=50,000 ohms, a 3-µF capacitor provides an RC time constant of 0.15 seconds. So the op-amp's output will take about 0.2 to 0.3 seconds to settle reasonably close to VS/2. Meanwhile, the input and output RC networks, will charge-up ten times faster.
In applications where the circuit's turn-on time may become excessively long, a Zener or active biasing method may be a better choice.