HMC1190A

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Broadband High IP3 Dual Channel Downconverter w/ Fractional-N PLL & VCO, 0.7 - 3.8 GHz

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Overview

  • Broadband Operation with no external matching
  • High-side and Low-side LO injection Operation
  • High Input IP3 of +24 dBm
  • Power Conversion Gain of 8.9 dB
  • Input P1dB of 11 dBm
  • SSB Noise Figure of 9 dB
  • 55 dBc Channel-to-Channel Isolation
  • Enable/Disable Mixer and PLLVCO independently
  • Single-ended RF input ports
  • Maximum Phase Detector Rate: 100 MHz
  • Low Phase Noise: -110 dBc/Hz in Band Typical
  • PLL FOM:
    • -230 dBc/Hz Integer Mode, -227 dBc/Hz Fractional Mode
    • <180 fs Integrated RMS Jitter (1 kHz to 20 MHz)
  • LO Low Noise Floor: -165 dBc/Hz
  • Mixer Low Noise Floor: -161 dBc/Hz
  • Integrated VCO
  • External VCO Input, differential LO output
  • Exact Frequency Mode
    • 0 Hz Fractional Frequency Error
  • Programmable RF Output Phase
  • Output Phase Synchronous Frequency Changes
  • Output Phase Synchronization
  • LO Output Mute Function
  • Compact Solution, 6x6 mm Leadless QFN Package

The HMC1190ALP6NE is a high linearity broadband dual channel downconverting mixer with integrated PLL and VCO optimized for multi-standard receiver applications that require a compact, low power design. Integrated wideband limiting LO amplifiers enable the HMC1190ALP6NE to achieve an unprecedented RF bandwidth of 700 MHz to 3800 MHz for applications including Cellular/3G, LTE/WiMAX/4G. Unlike conventional narrow-band downconverters, the HMC1190ALP6NE supports both high-side and low-side LO injection over all RF frequencies. The RF and LO input ports are internally matched to 50 Ohms.

The HMC1190ALP6NE features an integrated LO and RF baluns, enable control of IF and LO amplifiers and bias control interface to high linearity passive mixer cores. Balanced passive mixer combined with high-linearity IF amplifier architecture provides excellent LO-to-RF, LO-to-IF, and RF-to-IF isolations. Low noise figure of 9 dB, and high IIP3 of +24 dBm allow the HMC1190ALP6NE to be used in most demanding applications. External bias control pins enable optimization of already low power dissipation of 2.34 W (typical). Fast enable control interface reduces power consumption further in TDD applications.

External VCO input allows the HMC1190ALP6NE to lock external VCOs, and enables cascaded LO architectures for MIMO applications. Two separate Charge Pump (CP) outputs enable separate loop filters optimized for both integrated and external VCOs, and seamless switching between integrated or external VCOs during operation. Programmable RF output phase features can further phase adjust and synchronize multiple HMC1190ALP6NEs enabling scalable MIMO and beam-forming radio architectures.

Additional features include configurable LO output mute function, Exact Frequency Mode that enables the HMC1190ALP6NE to generate fractional frequencies with 0 Hz frequency error, and the ability to synchronously change frequencies without changing phase of the output signal that increases efficiency of digital pre-distortion loops. The HMC1190ALP6NE is housed in RoHS compliant compact 6x6 mm leadless QFN package.

Applications

  • Multiband/Multi-standard Cellular BTS Diversity Receivers
  • GSM & 3G & LTE/WiMAX/4G
  • MIMO Infrastructure Receivers
  • Wideband Radio Receivers
  • Multiband Basestations & Repeaters

HMC1190A

Broadband High IP3 Dual Channel Downconverter w/ Fractional-N PLL & VCO, 0.7 - 3.8 GHz

HMC1190ALP6NE-FBL
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Documentation

Data Sheet

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Tools & Simulations

ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

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