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Актуальные ресурсы по теме
Заметки разработчика
Технические статьи
- Secure, Mission Critical Communications Require a New, Easy to Implement Approach
- System-Level LO Phase Noise Model for Phased Arrays with Distributed Phase-Locked Loops
- Communications Equipment Makers Demand High Power Outputs and Small Solution Footprints
- Bits to Beams: RF Technology Evolution for 5G Millimeter Wave Radios
- pH Sensor Reference Design Enabled for RF Wireless Transmission
- RF Converters Enable Efficient Multiband Radios for Next-Generation Wireless Base Stations
- 28 nm Analog-to-Digital Converters Enable Next-Generation Electronic Warfare Receiver Systems
- Supply Clean Power with Ultralow Noise LDO Regulators
- Silent Switcher µModule Regulators Quietly Power GSPS Sampling ADCs in Half the Space
- 5G Communication and Its Future
- Transceivers Speed Development of New Military and First-Responder Communications Solutions
- Phase Alignment and Control on the ADF4356/ADF5356 Devices
- TEC Controller Applications in Telecommunication Systems
- Need More Bandwidth for the Ka-Band? Here Are Three Options
- Receiver IC Blend Mixers, Synthesizers, and IF Amps
- An Interview with Analog Devices Discussing RF Electronics for Phased Array Applications
- Time Sensitive Networks: Real-Time Ethernet
- Physical Size Allocations for RF Electronics in Digital Beamforming Phased Arrays
- 2G to 5G Base Station Receiver Design Simplified by Innovative Integrated Transceivers
- Designing High Speed Analog Signal Chains From DC-to-Wideband
- The Differential-signal Advantage for Communications System Design
- Integrated Devices Arm Infrastructure Radios
- The Benefits of Direct-conversion Receiver Designs
- Semiconductors Simplify Direct-Conversion Design
Analog Dialogue
- Is It Possible to Fit Low EMI Power Supplies onto Crowded Boards?
- Automotive Radar Sensors and Congested Radio Spectrum: An Urban Electronic Battlefield?
- Dual-Loop Clock Generator Cleans Jitter, Provides Multiple High-Frequency Outputs
- Clock Skew in Large Multi-GHz Clock Trees
- How to Apply DC-to-DC Step-Down (Buck) Regulators Successfully
- RF-Sampling ADC Input Protection: Not Black Magic After All
- Powering GSPS or RF Sampling ADCs: Switcher vs. LDO
- Ferrite Beads Demystified
- Massive MIMO and Beamforming: The Signal Processing Behind the 5G Buzzwords
- Understanding Switching Regulator Output Artifacts Expedites Power Supply Design
- ADC Modeling Tools Speed Up Evaluation
- Power Management for Integrated RF ICs
- Analog Front End for 3G Femto Base Stations Brings Wireless Connectivity Home
- Ask The Applications Engineer—40: Switch and Multiplexer Design Considerations for Hostile Environments
- Analyzing and Managing the Impact of Supply Noise and Clock Jitter on High Speed DAC Phase Noise
- Passive Intermodulation (PIM) Effects in Base Stations: Understanding the Challenges and Solutions
- Ask the Applications Engineer—41: LDO Operational Corners: Low Headroom and Minimum Load
- An Engineering Walk Through Virtual Eval, ADI's Online Data Converter Product Evaluation Tool
- Discrete- and Integrated Control of Power Amplifiers in Base-Station Applications
- DDS Devices Generate High-Quality Waveforms Simply, Efficiently, and Flexibly
- Efficient FSK/PSK Modulator Uses Multichannel DDS to Switch at Zero Crossings
- Differential Interfaces Improve Performance in RF Transceiver Designs
- Phase Response in Active Filters
- Four Quick Steps to Production: Using Model-Based Design for Software-Defined Radio (Part 1)
- New Touch-Screen Controllers Offer Robust Sensing for Portable Displays
- S-Parameters Allow High-Frequency Verification of RF Switch Models
- Complex Power-Supply Sequencing Made Easy
- Interleaving ADCs: Unraveling the Mysteries
- Quickly Implement JESD204B on a Xilinx FPGA
- Design a PLL Filter When Only the Zero Resistor and Capacitor Are Adjustable
- Design, Simulate, and Document Proprietary Wireless Systems
- The Successful Implementation of High-Performance Digital Radio
- System Demonstration Platform Eases Transition from Evaluation to Prototyping
- Modeling Amplifiers as Analog Filters Increases SPICE Simulation Speed
- Understanding How Amplifier Noise Contributes to Total Noise in ADC Signal Chains
- New RF DAC Broadens Software-Defined Radio Horizon
- Activate Cell Phone Indicator LEDs While Preserving Standby Time
- Crossing a New Frontier of Multiband Receivers with Gigasample ADCs—Part One
- Boost Supply and High-Voltage DAC Provide Tuning Signal for Antennas and Filters
- Low-Voltage Current Sink Controls High-Voltage LED String
- What’s Up With Digital Downconverters—Part 1
- Highest Power Density, Multirail Power Solution for Space-Constrained Applications
- An Integrated Bidirectional Bridge with Dual RMS Detectors for RF Power and Return-Loss Measurement
- Some Recent Developments in the Art of Receiver Technology: A Selected History on Receiver Innovations over the Last 100 Years
- RF Transceivers Provide Breakthrough SWaP Solutions for Aerospace and Defense
- Where Zero-IF Wins: 50% Smaller PCB Footprint at ⅓ the Cost
- How to Design and Debug a Phase-Locked Loop (PLL) Circuit
- Multipliers vs. Modulators
- HDMI Made Easy: HDMI-to-VGA and VGA-to-HDMI Converters
- Four Quick Steps to Production: Using Model-Based Design for Software-Defined Radio (Part 3)
- Four Quick Steps to Production: Using Model-Based Design for Software-Defined Radio (Part 4)
- Four Quick Steps to Production: Using Model-Based Design for Software-Defined Radio (Part 2)
- High Definition, Low Delay, SDR-Based Video Transmission in UAV Applications
- Applying a High-performance Video Operational Amplifier
- Using ESD Diodes as Voltage Clamps
- Complex RF Mixers, Zero-IF Architecture, and Advanced Algorithms: The Black Magic in Next-Generation SDR Transceivers
- What’s Up With Digital Downconverters—Part 2
- Monolithic 80-dB +5 V Single-supply Log Amp Has 50-MHz Frequency Range
- Single-Chip Clock Generator with 14-Channel Distribution Solves Timing Challenges in Networks
- High-Speed DAC Controls Power Amplifier Ramp Profile
- Dual Axis, Low g, Fully Integrated Accelerometers
- Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 2
- Selecting Mixed Signal Components for Digital Communication Systems—III: Sharing the Channel
- JPEG 2000 Image Compression
- DSPs Enhance Flexible Third-Generation Base-Station Design
- 200-MHz 16 x 16 Video Crosspoint Switch IC
- Selecting Mixed Signal Component for Digital Communications Systems IV: Receiver Architecture Considerations
- 14-Bit Monolithic ADCs: First to Sample Faster than 1 MSPS
- Build a Smart Analog Process-Instrument Transmitter with Low-Power Converters and a Microcontroller
- Direct Digital Synthesis (DDS) Controls Waveforms in Test, Measurement, and Communications
- Wireless Short-Range Devices: Designing a Global License-Free System for Frequencies <1 GHz
- Using Dual-Axis Accelerometers to Protect Hard Disk Drives
- Support for the Designer—Improved ADI Website Helps You
- A Smart Modem for Robust Wireless Data Transmission Over ISM Bands (433 MHz, 868 MHz, and 902 MHz)
- Blackfin® Processor's Parallel Peripheral Interface Simplifies LCD Connection in Portable Multimedia
- Design a Direct 6-GHz Local Oscillator with a New, Wideband, Integer-N, PLL Synthesizer
- AD9873 Mixed-Signal Front-End (MxFE) for Broadband Digital Set-Top Boxes
- Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 1
- Single-Sideband Upconversion of Quadrature DDS Signals to the 800-to-2500-MHz Band
- Selecting Mixed-Signal Components for Digital Communications Systems—Part V
- VDSL Technology Issues—An Overview
- New TxDAC® Generation
- Wideband Radios Need Wide Dynamic Range Converters
- Highly Integrated Stereo Codec ICs Drive Multimedia
- Fast, Accurate, Timing Recovery for Fiber Optics Links
- Switching in USB Consumer Applications
- Power Supply Management—Principles, Problems, and Parts
- Design Your Own VoIP Solution with a Blackfin® Processor—Add Enhancements Later
- Versatile Mixed-Signal Front Ends Speed Customized Design of Wireline Broadband Modems and Home Networks
- X-Amp™, A New 45-dB, 500-MHz Variable-Gain Amplifier (VGA) Simplifies Adaptive Receiver Designs
- High Performance Narrowband Receiver Design Simplified by IF Digitizing Subsystem in LQFP
- Single-Chip Digitally Controlled Data-Acquisition as Core of Reliable DWDM Communication Systems
- AD607 Architecture
- Advanced Digital Video Encoders
- Selecting Mixed-Signal Components for Digital Communication Systems—An Introduction
- Solving Dynamic Range Problems in Analog Systems
- Data Converter Function Can Help Solve Cost and Size Design Challenges in 3G and 4G Wireless Infrastructure
- Dynamic Memory Allocation Optimizes Integration of Blackfin® Processor Software
- Fast-Locking, High Sensitivity Tuned-IF Radio Receiver Achieved with a 7-GHz Synthesizer
- Single-Chip Direct Digital Synthesis vs. the Analog PLL
- Broadband I/Q Modulator Eases Radio Design
- Solving Power-Management Problems with a Single Chip that Handles up to 7 Channels of Sequencing, Monitoring, and Supervision
- DACs are Optimized for Communication Transmit Path
- Selecting Mixed-Signal Components for Digital Communication Systems-II
- Buffered Multiplexers for Video Applications
- IF Stages are Going Digital for Both Analog and Digital Signals
- Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 3
- How to Apply DC-to-DC Step-Up (Boost) Regulators Successfully
- Innovative Mixed-Signal Chipset Targets Hybrid-Fiber Coaxial Cable Modems
Вебкаст
- Understanding Power System Management
- Advances In Unmanned Systems Technology Electronics Solutions
- Simplify and Reduce Active Filter Design Time
- Fundamentals of Clocks
- Explaining Phase Noise
- Fundamentals of Frequency Synthesis, Part 1: Phased Locked Loops
- Performance Clocks: Demystifying Jitter
- Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
- Fundamentals of Data Conversion in Receivers
- RF Detectors Help Solve System Design Challenges
- Multi-Channel Phase And Frequency Synchronization Made Easy
- Sensor Signal Conditioning with Synchronous Demodulation
- RF Technology for 5G mmWave Radios
- Digital Beamforming Techniques for Phased Array Systems
- The Art of Military Communications
- Making Precision Signal Chain Design Easier
- RF Technology for 5G Radio Base Stations
- Simplify Power Designs with Micromodule Products
- Network Clock: How To Achieve Maximum System Up Time
- Solving Telecommunication Multiband Needs with Wideband Amplifiers
- Streamlining Flexible System Design using RF ADCs with DSP
- RF & MW Control Products in Silicon
- Integrated DPD for Small Cell and Massive MIMO
- Latest Developments in Analog Devices PLL Portfolio
- Six Cybersecurity Must-Haves to Secure the Edge
- Smart Partitioning and IoT System Development
- Overcoming Challenges in GaN Power Amplifier Implementations
- Getting the Most from ADI PLL Products
- Simplifying Radio Design Using a Wideband IF Receiver Subsystem IC
- Reliable Connectivity for IoT Devices
- Fundamentals of Data Converters
- Deep Learning for Radio Frequency Systems
- Enabling Small Form Factor, High Capacity Small Cell Platforms
- RF Converters Enable Multiple Wideband Applications
- Innovative Isolated RS-485, SPI and LVDS Communications
- Real-Time Audio Applications Enabled by Multicore SHARC DSP + ARM SOC
- Advances in Phased Array Analog Beamforming Solutions
- GSPS DACs Enable Ultra-Wide Bandwidth Applications
- Demystifying Dynamic Range in GSPS A/D Converters
- Signal Chain Optimization for IoT Applications
- Компоненты синхронизации Analog Devices: Оптимизация и поддержка интерфейсов JESD204B
Статьи по применению
- AN-1315: Autonomous IR Calibration on the ADF7024 (Rev. 0) PDF
- AN-1353: How to Bypass VCO Calibration for the ADF4355-2, ADF4355, ADF4355-3, ADF4356, ADF5355, and ADF5356 (Rev. D) PDF
- AN-1420: Phase Buildout and Hitless Switchover with Digital Phase-Locked Loops (DPLLs) (Rev. 0) PDF
- AN-1390: Manual Band Selection for PLL Lock Time Reduction (Rev. 0) PDF
- AN-0983: Introduction to Zero-Delay Clock Timing Techniques PDF
- AN-1126: More Boost with Less Stress: the SEPIC Multiplied Boost Converter (Rev. 0) PDF
- AN-1253: Layout Considerations for Digital Power Management (ADP1046A) (Rev. 0) PDF
- AN-1285: ADF7021-N Radio Performance for Wireless Meter-Bus (WM-Bus), Mode N (Rev. 0) PDF
- AN-1275: Rolling Data Buffer on the ADF7023 (Rev. 0) PDF
- AN-1276: Embedded Packet Error Rate Testing on the ADF7023 and ADF7023-J (Rev. 0) PDF
- AN-1258: Image Rejection Calibration on the ADF7021, ADF7021-N, and ADF7021-V (Rev. 0) PDF
- AN-1248: Интерфейс SPI (Rev. 0) PDF
- AN-1182: Принципы действия и оптимизация контура АРЧ в ADF7021 для получения минимальной длины преамбулы (Rev. 0) PDF
- AN-1177: Руководство по реализации схем с интерфейсом LVDS и M-LVDS (Rev. 0) PDF
- AN-1145: Расширенные возможности измерения мощности в ADP1047/ADP1048 (Rev. 0) PDF
- AN-1154: Оптимизация фазового шума и побочных составляющих в синтезаторах с ФАПЧ ADF4157 и ADF4158 при помощи постоянного отрицательного тока разряжения (Rev. 0) PDF
- AN-1123: Руководство по реализации интерфейса CAN (Controller Area Network) (Rev. 0) PDF
- AN-1106: Улучшенная топология для формирования биполярного питания из одного входного напряжения (Rev. A) PDF
- AN-1100: Баланс квадратур и подавление зеркальной составляющей в беспроводных передатчиках PDF
- AN-0988: The AD9552: A Programmable Crystal Oscillator for Network Clocking Applications (Rev. 0) PDF
- AN-1040: Улучшение характеристик беспроводных передатчиков при помощи калибровки мощности ВЧ сигнала (Rev. 0) PDF
- AN-0996: Преимущества применения квадратурных преобразователей с повышением частоты в передатчиках микроволновых систем “точка-точка” (Rev. 0) PDF
- AN-0974: Возможность практической реализации систем TD-SCMA с многими несущими (Rev. 0) PDF
- AN-920: Компенсация рассогласований коэффициента усиления, фазы и сквозного прохождения гетеродина в передатчиках с одной боковой полосой на основе ЦАП TxDAC AD9788 и квадратурного модулятора ADL5372 (Rev. 0) PDF
- AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0) PDF
- AN-756: Дискретные системы и влияние фазового шума и дрожания фазы тактового сигнала (Rev. 0) PDF
Брошюры и бюллетени
Особенности продукта
Инструменты проектирования
- Инструмент проектирования стабилизаторов напряжения ADIsimPower™
- ADIsimPLL™
- ADIsimRF
- ADIsimCLK Design and Evaluation Software
- ADIsimSRD Design Studio
- ADIsimDDS (Direct Digital Synthesis)
Видео
- Introducing ADI's 4th Generation µModule® Regulators
- Getting Started with ADI Software Defined Radio (SDR) SOM
- iCoupler® Digital Isolators in Motor Control Designs
- Interview: ADI Capabilities in VSAT and Millimeter-wave
- Increase Performance While Reducing Size with RF PLLs
- Unboxing the AD9371 RadioVerse Integrated RF Transceiver
Обучающие материалы
Руководство по выбору компонента
Редко задаваемые вопросы
- This Noise Will Keep You Up at Night
- Psychotic ADC?
- Unfiltered Analog
- EngineerZone Makes Getting Answers a Breeze
- Electronics is Fun
- Mystery Spur Explained: Don't Blame the DDC!
- The Decline of Rounding—or How Significant is Significance?
- Because Mr. Ohm Said So …
- Missing Half the Signal
- Check the Bias Current
- Why Good Engineers Use the Best Components
- Synchronous Rectification on the Secondary Side
- Unique Gate Drive Applications Enable Rapidly Switching On/Off for Your High Power Amplifier
- Presto! Multiply Your ADC’s Virtual Channel Count with DDC Magic
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